[PATCH] STM32H743ZI Nucleo and basic lwIP support
Vijay Kumar Banerjee
vijay at rtems.org
Fri Apr 2 16:31:59 UTC 2021
On Fri, Apr 2, 2021 at 2:25 AM Robin Müller <robin.mueller.m at gmail.com>
wrote:
>
> Hi Vijay,
>
> It looks interesting, but I am not really a LwIP expert. I might look
into it once I have more time in 1-2 weeks.
> I only have a BBB and the STM32H7 as test HW right now, but I guess this
is a good starting point.
That indeed is a good starting point.
> Does this mean that the lwIP repository contains the architecture
specific sources shown above? (so the DMA descriptors basically and maybe
the LAN device driver).
Yes, The architecture-specific sources (like the LAN driver) will go to the
lwip repository. The repository isn't really that well structured yet but I
would be working on getting it in shape and there's also interest from a
GSoC student, so this might come in shape with combined efforts. :)
>The lwIP support would then be built as part of the BSP?
The BSP would be built without any specific network stack. The network
stack is supposed to be built separately and then used with the BSP, which
means all the network-related drives go into respective network stacks
(lwip is one of these 3 network stacks). So far this is the plan and the
legacy network drivers have already been moved to its own separate
repository, so we'll take a similar approach for lwip as well
>And would it use the mainloop mode or the OS mode? The STM32 example I
implemented uses the mainloop mode with NO_SYS defined to 1, so I am not
familiar with the OS mode, but I guess it would make sense to use the OS
mode, porting it to RTEMS.
Yes, it would make sense to use the OS mode. I guess the NO_SYS needs to be
set to 0, which means it'll use the sys_arch definitions. We have an RTEMS
port for the sys_arch, done by Pavel Pisa. You can find it here:
https://git.rtems.org/vijay/rtems-lwip.git/tree/lwip/ports/os/rtems/arch/sys_arch.h
. It could be possible that all the drivers use this port and extend the
sys_arch module according to the requirements, but I'm not totally sure if
or how that'll work out. If each driver needs to have a separate sys_arch
file, we'll have to add it along with the drivers and find a way to select
the correct sources for the given bsp. I think that using an ini or yaml
config file to define the requirements would be a clean solution to teach
waf which modules to build.
Thank you for working on getting lwip integrated with stm32 h7. This would
be a great start for the rtems-lwip and I'm happy to work with you to get
it merged to that repository. I have also found a BBB driver for lwip and
I'll try to integrate that as well. We'll probably be able to get hardware
tests from these two boards soon. :)
Best regards,
Vijay
>
> Kind Regards
> Robin
>
>
> On Mon, 29 Mar 2021 at 22:25, Vijay Kumar Banerjee <vijay at rtems.org>
wrote:
>>
>> On Mon, Mar 29, 2021 at 9:52 AM Gedare Bloom <gedare at rtems.org> wrote:
>> >
>> > On Mon, Mar 29, 2021 at 6:17 AM Robin Mueller <
robin.mueller.m at gmail.com> wrote:
>> > >
>> > > This patch adds support for the STM32H743ZI-Nucleo board
>> > > variation. This currently works by setting the STM32H743ZI_NUCLEO
>> > > flag in the config.ini flag
>> > >
>> > > It also adds basic lwIP support which can be enabled
>> > > with the flag STM32H7_ADD_LWIP. This enables certain functionalities
>> > > required for lwIP to work properly
>> > >
>> > > This patch also changes the default implementation
>> > > of HAL_GetTick to return the system tick by forwarding the call
>> > > to the respective RTEMS function.
>> > >
>> > > ---
>> > > bsps/arm/stm32h7/console/console-usart3-cfg.c | 21 ++++++++++++++++
>> > > bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c | 16 ++++++++-----
>> > > .../stm32h7/include/Legacy/stm32_hal_legacy.h | 4 +++-
>> > > bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h | 11 ++++++++-
>> > > bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h | 1 +
>> > > bsps/arm/stm32h7/start/bspstart.c | 2 +-
>> > > bsps/arm/stm32h7/start/stm32h7-hal-eth.c | 3 +--
>> > > spec/build/bsps/arm/stm32h7/bspstm32h7.yml | 4 ++++
>> > > spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 ++++++++++
>> > > spec/build/bsps/arm/stm32h7/optlwip.yml | 24
+++++++++++++++++++
>> > > 10 files changed, 88 insertions(+), 11 deletions(-)
>> > > create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml
>> > > create mode 100644 spec/build/bsps/arm/stm32h7/optlwip.yml
>> > >
>> > > diff --git a/bsps/arm/stm32h7/console/console-usart3-cfg.c
b/bsps/arm/stm32h7/console/console-usart3-cfg.c
>> > > index b40f6da5aa..dc552610e1 100644
>> > > --- a/bsps/arm/stm32h7/console/console-usart3-cfg.c
>> > > +++ b/bsps/arm/stm32h7/console/console-usart3-cfg.c
>> > > @@ -25,12 +25,32 @@
>> > > * POSSIBILITY OF SUCH DAMAGE.
>> > > */
>> > >
>> > > +#ifdef __rtems__
>> > > +#include <bspopts.h>
>> > > +#endif
>> > > +
>> > > #ifdef HAVE_CONFIG_H
>> > > #include "config.h"
>> > > #endif
>> > >
>> > > #include <stm32h7/hal.h>
>> > >
>> > > +#if STM32H743ZI_NUCLEO == 1
>> > > +const stm32h7_uart_config stm32h7_usart3_config = {
>> > > + .gpio = {
>> > > + .regs = GPIOD,
>> > > + .config = {
>> > > + .Pin = GPIO_PIN_8 | GPIO_PIN_9,
>> > > + .Mode = GPIO_MODE_AF_PP,
>> > > + .Pull = GPIO_NOPULL,
>> > > + .Speed = GPIO_SPEED_FREQ_LOW,
>> > > + .Alternate = GPIO_AF7_USART3
>> > > + }
>> > > + },
>> > > + .irq = USART3_IRQn,
>> > > + .device_index = 2
>> > > +};
>> > > +#else
>> > > const stm32h7_uart_config stm32h7_usart3_config = {
>> > > .gpio = {
>> > > .regs = GPIOB,
>> > > @@ -45,3 +65,4 @@ const stm32h7_uart_config stm32h7_usart3_config = {
>> > > .irq = USART3_IRQn,
>> > > .device_index = 2
>> > > };
>> > > +#endif /* STM32H743ZI_NUCLEO == 1 */
>> > > diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
>> > > index 4f2634df5b..6c3590bce8 100644
>> > > --- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
>> > > +++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
>> > > @@ -146,6 +146,10 @@
>> > > /* Includes
------------------------------------------------------------------*/
>> > > #include "stm32h7xx_hal.h"
>> > >
>> > > +#ifdef __rtems__
>> > > +#include <bspopts.h>
>> > > +#endif
>> > > +
>> > > /** @addtogroup STM32H7xx_HAL_Driver
>> > > * @{
>> > > */
>> > > @@ -361,10 +365,10 @@ HAL_StatusTypeDef
HAL_ETH_Init(ETH_HandleTypeDef *heth)
>> > > /*------------------ MAC, MTL and DMA default Configuration
----------------*/
>> > > ETH_MACDMAConfig(heth);
>> > >
>> > > -#ifndef __rtems__
>> > > +#if STM32H7_ADD_LWIP == 1
>> >
>> > Someone else may be able to address whether we need to disable this
>> > stuff for 'non-lwip' builds of stm32. There is an ongoing effort to
>> > collect lwip drivers and lwip build as a library after building rtems,
>> > so maybe this will move eventually to the lwip driver repo when that
>> > gets into production.
>> >
>> Hi,
>>
>> Yes, we're moving all the network stacks out of RTEMS so that a user
>> can choose their preferred network stack to work with RTEMS. The LWIP
>> repository is in initial state and it is gradually starting to include
>> the drivers. This lwip patch would be a great start of adding the
>> drivers and I'm happy to work with you to get it integrated into that
>> repository. Would you be interested in taking a look at it and adding
>> it to the rtems-lwip repository?
>> https://git.rtems.org/vijay/rtems-lwip.git/
>>
>> Once this is in a working state, this repository will be added to
>> rtems top directory as official rtems-lwip.
>>
>>
>> Best regards,
>> Vijay
>> > > /* SET DSL to 64 bit */
>> > > MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL,
ETH_DMACCR_DSL_64BIT);
>> > > -#endif /* __rtems__ */
>> > > +#endif
>> > >
>> > > /* Set Receive Buffers Length (must be a multiple of 4) */
>> > > if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
>> > > @@ -2647,7 +2651,7 @@ static void
ETH_MAC_MDIO_ClkConfig(ETH_HandleTypeDef *heth)
>> > > */
>> > > static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
>> > > {
>> > > -#ifndef __rtems__
>> > > +#if STM32H7_ADD_LWIP == 1
>> > > ETH_DMADescTypeDef *dmatxdesc;
>> > > uint32_t i;
>> > >
>> > > @@ -2674,7 +2678,7 @@ static void
ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
>> > >
>> > > /* Set Transmit Descriptor Tail pointer */
>> > > WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)
heth->Init.TxDesc);
>> > > -#endif /* __rtems__ */
>> > > +#endif /* STM32H7_ADD_LWIP == 1 */
>> > > }
>> > >
>> > > /**
>> > > @@ -2686,7 +2690,7 @@ static void
ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
>> > > */
>> > > static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
>> > > {
>> > > -#ifndef __rtems__
>> > > +#if STM32H7_ADD_LWIP == 1
>> > > ETH_DMADescTypeDef *dmarxdesc;
>> > > uint32_t i;
>> > >
>> > > @@ -2719,7 +2723,7 @@ static void
ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
>> > >
>> > > /* Set Receive Descriptor Tail pointer Address */
>> > > WRITE_REG(heth->Instance->DMACRDTPR,
((uint32_t)(heth->Init.RxDesc + (((uint32_t)(ETH_RX_DESC_CNT -
1))*sizeof(ETH_DMADescTypeDef)))));
>> > > -#endif /* __rtems__ */
>> > > +#endif /* STM32H7_ADD_LWIP == 1 */
>> > > }
>> > >
>> > > /**
>> > > diff --git a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
>> > > index c311c1618e..c4fa5d7151 100644
>> > > --- a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
>> > > +++ b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
>> > > @@ -420,7 +420,9 @@
>> > > #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
>> > > #define TYPEPROGRAMDATA_FASTHALFWORD
FLASH_TYPEPROGRAMDATA_FASTHALFWORD
>> > > #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
>> >
>> > Can you instead use:
>> > #ifndef __rtems___
>> > > -#define PAGESIZE FLASH_PAGE_SIZE
>> > > +/* Commented out for the RTEMS BSP because there can be nameclashes
with another
>> > > +similar defininition in limits.h */
>> > > +//#define PAGESIZE FLASH_PAGE_SIZE
>> > #endif
>> >
>> > > #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
>> > > #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
>> > > #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
>> > > diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
>> > > index d423e4f782..b608188b4f 100644
>> > > --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
>> > > +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
>> > > @@ -21,6 +21,9 @@
>> > > #ifndef __STM32H7xx_HAL_CONF_H
>> > > #define __STM32H7xx_HAL_CONF_H
>> > >
>> > > +#ifdef __rtems__
>> > > +#include <bspopts.h>
>> > > +#endif /* __rtems__ */
>> > > #ifdef __cplusplus
>> > > extern "C" {
>> > > #endif
>> > > @@ -103,7 +106,13 @@
>> > > * (when HSE is used as system clock source, directly or
through the PLL).
>> > > */
>> > > #if !defined (HSE_VALUE)
>> > > -#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the
External oscillator in Hz : FPGA case fixed to 60MHZ */
>> > > + #if STM32H743ZI_NUCLEO == 1
>> > > + /*!< External oscillator clock for the STM32H743ZI Nucleo */
>> > > + #define HSE_VALUE ((uint32_t)8000000)
>> > > + #else
>> > > + /*!< Value of the External oscillator in Hz : FPGA case fixed
to 60MHZ */
>> > > + #define HSE_VALUE ((uint32_t)25000000)
>> > > + #endif /* STM32H743ZI_NUCLEO == 1 */
>> > > #endif /* HSE_VALUE */
>> > >
>> > > #if !defined (HSE_STARTUP_TIMEOUT)
>> > > diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
>> > > index e9fecc4aa0..b171f7dac7 100644
>> > > --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
>> > > +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
>> > > @@ -27,6 +27,7 @@ extern "C" {
>> > >
>> > > /* Includes
------------------------------------------------------------------*/
>> > > #include "stm32h7xx_hal_def.h"
>> > > +#include "stm32h7xx_hal_dma.h"
>> > >
>> > > /** @addtogroup STM32H7xx_HAL_Driver
>> > > * @{
>> > > diff --git a/bsps/arm/stm32h7/start/bspstart.c
b/bsps/arm/stm32h7/start/bspstart.c
>> > > index 2fc8133cca..d942fbdcb3 100644
>> > > --- a/bsps/arm/stm32h7/start/bspstart.c
>> > > +++ b/bsps/arm/stm32h7/start/bspstart.c
>> > > @@ -34,7 +34,7 @@
>> > >
>> > > uint32_t HAL_GetTick(void)
>> > > {
>> > > - return 0;
>> > > + return rtems_clock_get_ticks_since_boot();
>> > > }
>> > >
>> > > uint32_t stm32h7_systick_frequency(void)
>> > > diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
>> > > index 46475f4316..36363f84a5 100644
>> > > --- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
>> > > +++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
>> > > @@ -64,8 +64,7 @@ static const stm32h7_gpio_config gpioa = {
>> > > }
>> > > };
>> > >
>> > > -void
>> > > -HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
>> > > +void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
>> > why this change?
>> >
>> > > {
>> > > stm32h7_clk_enable(STM32H7_MODULE_ETH1MAC);
>> > > stm32h7_clk_enable(STM32H7_MODULE_ETH1TX);
>> > > diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
>> > > index 80e13472c8..89b5a3c00d 100644
>> > > --- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
>> > > +++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
>> > > @@ -247,6 +247,10 @@ links:
>> > > uid: ../../optconsolebaud
>> > > - role: build-dependency
>> > > uid: ../../optconsoleirq
>> > > +- role: build-dependency
>> > > + uid: opth743nucleo
>> > > +- role: build-dependency
>> > > + uid: optlwip
>> > > - role: build-dependency
>> > > uid: ../grp
>> > > - role: build-dependency
>> > > diff --git a/spec/build/bsps/arm/stm32h7/opth743nucleo.yml
b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml
>> > > new file mode 100644
>> > > index 0000000000..2c4176bf00
>> > > --- /dev/null
>> > > +++ b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml
>> > > @@ -0,0 +1,13 @@
>> > > +actions:
>> > > +- get-boolean: null
>> > > +- define-condition: null
>> > > +build-type: option
>> > > +default: false
>> > > +default-by-variant: []
>> > > +enabled-by: true
>> > > +format: '{}'
>> > > +links: []
>> > > +name: STM32H743ZI_NUCLEO
>> > > +description: |
>> > > + Nucleo board. Use 8 MHz HSE external clock and different pins for
the UART console.
>> > > +type: build
>> > > diff --git a/spec/build/bsps/arm/stm32h7/optlwip.yml
b/spec/build/bsps/arm/stm32h7/optlwip.yml
>> > > new file mode 100644
>> > > index 0000000000..04613a3bb6
>> > > --- /dev/null
>> > > +++ b/spec/build/bsps/arm/stm32h7/optlwip.yml
>> > > @@ -0,0 +1,24 @@
>> > > +actions:
>> > > +- get-boolean: null
>> > > +- env-assign: null
>> > > +- define-condition: null
>> > > +build-type: option
>> > > +default: false
>> > > +default-by-variant: []
>> > > +enabled-by: true
>> > > +format: '{}'
>> > > +links: []
>> > > +name: STM32H7_ADD_LWIP
>> > > +description: |
>> > > + This changes the code to allow lwIP to work properly based on the
STM32 lwIP example.
>> > > + The user must take care of the following steps in the application:
>> > > + 1. The lwIP DMA descriptors have to be placed into the
.bsp_no_cache section instead
>> > > + of custom sections
>> > > + 2. The sections need to be aligned to 32 bytes (0x20) boundaries
>> > > + This can be achieved by appending
>> > > + __attribute__((section(.bsp_no_cache),__aligned__(0x20)));
>> > > + to the descriptor definitions.
>> > > +type: build
>> > > +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
>> > > +copyrights:
>> > > +- Copyright (C) 2020 Robin Mueller
>> > > --
>> > > 2.23.0.windows.1
>> > >
>> > > _______________________________________________
>> > > devel mailing list
>> > > devel at rtems.org
>> > > http://lists.rtems.org/mailman/listinfo/devel
>> > _______________________________________________
>> > devel mailing list
>> > devel at rtems.org
>> > http://lists.rtems.org/mailman/listinfo/devel
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