[PATCH] smpfatal08: halt secondary RISC-V processors
gedare at rtems.org
Mon Apr 12 18:44:51 UTC 2021
How much do you think this is a RISC-V specific problem, or one that
may affect other SMP processors? Should we add an RTEMS API for this
capability instead of shimming some Asm into a test case?
On Sun, Apr 11, 2021 at 1:30 PM Jiri Gaisler <jiri at gaisler.se> wrote:
> smpfatal08 fails on SMP RISC-V systems because all cpus are started by the boot-loader and clobber the test output. This patch stops the secondary cpus with a WFI (wait-for-interrupt). Harmless if only one cpu is started by the loader, as in the griscv bsp.
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