[PATCH 2/2] added GPIOB option for STM32 ETH config
Robin Mueller
robin.mueller.m at gmail.com
Fri Apr 23 08:10:22 UTC 2021
Follow-up patch to avoid checks against the BSP name.
Separate option to only define the pins for nucleo-h743zi BSP
---
bsps/arm/stm32h7/start/stm32h7-hal-eth.c | 8 ++++++--
spec/build/bsps/arm/stm32h7/grp.yml | 2 ++
.../bsps/arm/stm32h7/optethgpiobregs.yml | 19 +++++++++++++++++++
.../bsps/arm/stm32h7/optethgpiogregs.yml | 2 +-
4 files changed, 28 insertions(+), 3 deletions(-)
create mode 100644 spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
index 0a128e4e5a..b9dac6d7f9 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
@@ -66,10 +66,12 @@ static const stm32h7_gpio_config gpioa = {
}
};
+#ifdef STM32H7_ETH_GPIOB_PINS
+
static const stm32h7_gpio_config gpiob = {
.regs = GPIOB,
.config = {
- .Pin = GPIO_PIN_13,
+ .Pin = STM32H7_ETH_GPIOB_PINS,
.Mode = GPIO_MODE_AF_PP,
.Pull = GPIO_NOPULL,
.Speed = GPIO_SPEED_FREQ_LOW,
@@ -77,6 +79,8 @@ static const stm32h7_gpio_config gpiob = {
}
};
+#endif
+
void
HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
{
@@ -86,7 +90,7 @@ HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
stm32h7_gpio_init(&gpiog);
stm32h7_gpio_init(&gpioc);
stm32h7_gpio_init(&gpioa);
-#if RTEMS_BSP == nucleo-h743zi
+#ifdef STM32H7_ETH_GPIOB_PINS
stm32h7_gpio_init(&gpiob);
#endif
}
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml b/spec/build/bsps/arm/stm32h7/grp.yml
index 9e35cb49ac..a7e7affa05 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -85,6 +85,8 @@ links:
uid: optvariant
- role: build-dependency
uid: optethgpiogregs
+- role: build-dependency
+ uid: optethgpiobregs
- role: build-dependency
uid: ../../optconsolebaud
- role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
new file mode 100644
index 0000000000..fcd720f186
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
@@ -0,0 +1,19 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: null
+default-by-variant:
+- value: GPIO_PIN_13
+ variants:
+ - arm/nucleo-h743zi
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_ETH_GPIOB_PINS
+description: |
+ GPIO B pins used for the ETH pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml
index b76e19eb36..a6c0acbb7d 100644
--- a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml
+++ b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml
@@ -12,7 +12,7 @@ format: '{}'
links: []
name: STM32H7_ETH_GPIOG_PINS
description: |
- GPIO pins used for the ETH pin configuration.
+ GPIO G pins used for the ETH pin configuration.
type: build
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
--
2.25.1
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