[PATCH] bsps/aarch64: Remove erroneous cache feature
Kinsey Moore
kinsey.moore at oarcorp.com
Fri Dec 10 15:49:37 UTC 2021
The AArch64 cache implementation does not define
rtems_cache_disable_data(), but declares that it does via
CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA. The existing implementation of
_CPU_cache_disable_data() is sufficient to enable this functionality
without the erroneous cache feature flag.
Closes #4569
---
bsps/aarch64/shared/cache/cache.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/bsps/aarch64/shared/cache/cache.c b/bsps/aarch64/shared/cache/cache.c
index 9e7446a077..fc1766c2b9 100644
--- a/bsps/aarch64/shared/cache/cache.c
+++ b/bsps/aarch64/shared/cache/cache.c
@@ -47,8 +47,6 @@
#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
-#define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
-
#define AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ( (size_t) 64 )
#define AARCH64_CACHE_PREPARE_MVA(mva) (const void *) \
RTEMS_ALIGN_DOWN ( (size_t) mva, AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT )
--
2.30.2
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