[PATCH 1/3] aarch64: add internal API for secure monitor call (smc)

Gedare Bloom gedare at rtems.org
Sat Dec 11 16:19:03 UTC 2021


On Mon, Oct 18, 2021 at 8:18 AM Kinsey Moore <kinsey.moore at oarcorp.com> wrote:
>
> Comments inline below.
>
> On 10/16/2021 15:12, Gedare Bloom wrote:
> > ---
> >   cpukit/score/cpu/aarch64/aarch64-smc.c        | 72 ++++++++++++++++
> >   .../aarch64/include/rtems/score/aarch64-smc.h | 84 +++++++++++++++++++
> >   spec/build/cpukit/cpuaarch64.yml              |  2 +
> >   3 files changed, 158 insertions(+)
> >   create mode 100644 cpukit/score/cpu/aarch64/aarch64-smc.c
> >   create mode 100644 cpukit/score/cpu/aarch64/include/rtems/score/aarch64-smc.h
> >
> > diff --git a/cpukit/score/cpu/aarch64/aarch64-smc.c b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > new file mode 100644
> > index 0000000000..4cfee91a0b
> > --- /dev/null
> > +++ b/cpukit/score/cpu/aarch64/aarch64-smc.c
> > @@ -0,0 +1,72 @@
> > +/* SPDX-License-Identifier: BSD-2-Clause */
> > +
> > +/**
> > + *  @file
> > + *
> > + *  @brief Secure Monitor Call
> > + */
> > +
> > +/*
> > + * Copyright (C) 2021 Gedare Bloom <gedare at rtems.org>
> > + *
> > + * Redistribution and use in source and binary forms, with or without
> > + * modification, are permitted provided that the following conditions
> > + * are met:
> > + * 1. Redistributions of source code must retain the above copyright
> > + *    notice, this list of conditions and the following disclaimer.
> > + * 2. Redistributions in binary form must reproduce the above copyright
> > + *    notice, this list of conditions and the following disclaimer in the
> > + *    documentation and/or other materials provided with the distribution.
> > + *
> > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> > + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> > + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
> > + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> > + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
> > + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
> > + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
> > + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
> > + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> > + * POSSIBILITY OF SUCH DAMAGE.
> > + */
> > +
> > +#ifdef HAVE_CONFIG_H
> > +#include "config.h"
> > +#endif
> > +
> > +#include <rtems/score/aarch64-smc.h>
> > +
> > +int _AArch64_SMC_Invoke(
> > +  int function_id,
> Nit: The function ID should be uint32_t.
> > +  uintptr_t arg0,
> > +  uintptr_t arg1,
> > +  uintptr_t arg2,
> > +  uintptr_t arg3,
> > +  uintptr_t arg4,
> > +  uintptr_t arg5,
> > +  uintptr_t arg6,
> > +  uintptr_t arg7,
> Only arguments 0-7 are passed in registers according to the AAPCS64.
> arg7 here would be the 9th argument and thus passed on the stack which
> is incompatible with the SMC calling convention which exclusively uses
> registers for passing arguments. It should be fine to drop this argument
> since we're not yet using any PSCI functionality that requires that many
> arguments.

Nice catch, thanks for this one. It would have messed up the return values.


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