[PATCH] Basic lwIP for STM32H7 BSP
robin.mueller.m at gmail.com
Thu Feb 4 17:45:34 UTC 2021
Could you look into this, based on the existing patch? I don't really have
the time to look (deeply) into it in the next few weeks,
and the changes are probably easier for you to implement. I can offer to
test it though :-)
On Thu, 4 Feb 2021 at 14:41, Sebastian Huber <
sebastian.huber at embedded-brains.de> wrote:
> On 04/02/2021 14:39, Joel Sherrill wrote:
> > On Thu, Feb 4, 2021, 6:18 AM Robin Müller <robin.mueller.m at gmail.com
> > <mailto:robin.mueller.m at gmail.com>> wrote:
> > I think the DMA descriptors need to be 32 byte (0x20) aligned.
> > That's the reason the example application was set up like this.
> > But you can just as easily turn them into pointers which point to 32
> > byte aligned areas in a nocache region.
> > Just wondering if that's possible with the code because I think it
> > would be easier with the existing linkcmds to assign a nocache area as
> > you need and then split it by hand.
> > Sebastian... ?
> I would prefer to use a generic linker section definition and then
> simply define global data structures in the right section with the right
> alignment (see RTEMS_ALIGN()).
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