sifive risc-v hifive unleashed bsp (qemu)
Hesham Almatary
hesham.almatary at cl.cam.ac.uk
Fri Feb 12 09:31:05 UTC 2021
On Fri, 12 Feb 2021 at 11:24, Sanskar Khandelwal <kdsanskar07 at gmail.com> wrote:
>
> Hello joel,
>
> 1. #4162 : sifive risc-v hifive unleashed bsp (qemu)
> As you mentioned this a good project i thought to search more about this project I learned a lot while doing so but I still don't understand what is the goal of this project (the description on the ticket is not very detailed ) also I don't have any idea on how to make approach for this project right now so if you can clear both my doubt it will be big help.
>
You'd need to identify the devices for this platform that QEMU
supports (e.g., networking, UART, flash, etc?) and propose some
timeline to implement (a subset of) them. That would be part of your
proposal evaluation.
> Also as you mention that this can be a big task for a gsoc time frame I am thinking that I can do some of it after gsoc too.
>
> Also I looked for some more open projects and found these interesting so I wanted to know if these are open for participation for gsoc and what's their status and what further enhancement you are looking at each of them.
>
> 2. #3337 : RISC-V Port in Supervisor Mode
> 3. #4182 : Port Rust to RTEMS
>
> Another thing is that while I am learning more about these projects I want to contribute, so if you can tell me about any issue that I can work on, it will be nice. I think this will help get me more familiar with rtems too.
>
> Thanks
> Sanskar
> _______________________________________________
> devel mailing list
> devel at rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
More information about the devel
mailing list