[PATCH 4/4] powerpc/motorola_powerpc: Add cache coherent memory to the allocator

chrisj at rtems.org chrisj at rtems.org
Mon Feb 15 22:45:20 UTC 2021


From: Chris Johns <chrisj at rtems.org>

Updates #4245
Updates #4243
---
 bsps/powerpc/motorola_powerpc/start/bspstart.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c
index ef8418e2c6..a781297565 100644
--- a/bsps/powerpc/motorola_powerpc/start/bspstart.c
+++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c
@@ -44,6 +44,9 @@ extern void set_L2CR(unsigned);
 extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
 extern void			BSP_pgtbl_activate(Triv121PgTbl);
 
+#define PPC_MIN_BAT_SIZE (128 * 1024)
+static char cc_memory[PPC_MIN_BAT_SIZE] RTEMS_ALIGNED(PPC_MIN_BAT_SIZE);
+
 SPR_RW(SPRG1)
 
 #if defined(DEBUG_BATS)
@@ -351,6 +354,9 @@ static void bsp_early( void )
     setdbat(3, 0, 0, 0, 0);
   }
 
+  setdbat(3, (intptr_t) &cc_memory[0], (intptr_t) &cc_memory[0], PPC_MIN_BAT_SIZE, IO_PAGE);
+  rtems_cache_coherent_add_area(&cc_memory[0], PPC_MIN_BAT_SIZE);
+
 #if defined(DEBUG_BATS)
   ShowBATS();
 #endif
-- 
2.24.1



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