Question about Raspberry Pi bspstarthooks.c - potential patch

[Alan Cudmore]

I tried to implement the deprecated cp15 ARMv6 data sync and
instruction sync barriers in the code below. I'm not sure if I got it
right.
The samples run on the single core models, but they also run without
the sync instructions (the commented out code).

For the conditional code, I chose the __ARM_ARCH_6KZ__ define, since
it is set by the arch switch the Pi 1 BSP uses. Not all ARMv6 models
have the CP15 VBAR, so in the unlikely event we added an even older
ARMv6 it would break. I can change it to __ARM_ARCH == 6 if that is
preferred.

At this point, my questions are:
1. Is the define OK?
2. Include the sync barriers for ARMv6 or not?
3. If we keep the sync barriers, are they good enough, or do they need
more work?

Thanks,
Alan

Patch:

diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index 698495d32e..bb8ad24e96 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -482,16 +482,26 @@ bsp_start_hook_0_done:

 .Lvector_table_copy_done:

-#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
        /*
         * This code path is only executed by the primary processor.  Set the
         * VBAR to the normal vector table.  For secondary processors, this is
         * done by bsp_start_hook_0().
         */
+#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
        ldr     r0, =bsp_vector_table_begin
        dsb
        mcr     p15, 0, r0, c12, c0, 0
        isb
+#elif defined __ARM_ARCH_6KZ__
+/*
+**     ldr     r0, =bsp_vector_table_begin
+**     mcr     p15, 0, r0, c12, c0, 0
+*/
+        mov     r1, #0
+        ldr     r0, =bsp_vector_table_begin
+        mcr     p15, 0, r1, c7, c10, 4      /* DataSync */
+        mcr     p15, 0, r0, c12, c0, 0      /* Load VBAR */
+        mcr     p15, 0, r1, c7, c5, 4       /* Flush Prefetch */
 #endif

        SWITCH_FROM_ARM_TO_THUMB        r3

On Thu, Jul 1, 2021 at 10:02 AM Sebastian Huber
<sebastian.huber at embedded-brains.de> wrote:
>
> On 01/07/2021 15:43, Alan Cudmore wrote:
> > The define works, but Armv6 does not implement dsb and isb.
>
> Ok, I think there are some (now deprecated) CP15 registers for dsb and isb.
>
> > I created a separate #if block for Armv6 without the dsb and isb
> > instructions and it seems to work on the Raspberry Pi Zero.
> > Do you think the equivalent synchronization operations are necessary
> > here? If so, I can research and test them. I found some references on
> > Raspberry Pi forums that I can follow (also had links to the ARM
> > manuals)
> >
> > Also, for the #if blocks, would you prefer this style:
> > #if (7A or 8)
> > ..
> > #else if (6)
> > ..
> > #endif
>
> Yes, this would be good.
>
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