[PATCH] STM32H7 ethernet pin corrections

[Robin Mueller]

These patches were submitted a few months ago, but it was found out
that the default-by-family: [] were missing in the GPIO .yml lines. 
This was fixed in this patch.

This patch accounts for different pins for the ETH peripheral
on STM32H7 devices. For example, the Nucleo H743ZI has slightly
different pins than other STM32H7 boards.
---
 bsps/arm/stm32h7/start/stm32h7-hal-eth.c      | 22 ++++++++++++++++++-
 spec/build/bsps/arm/stm32h7/grp.yml           |  4 ++++
 .../bsps/arm/stm32h7/optethgpiobregs.yml      | 20 +++++++++++++++++
 .../bsps/arm/stm32h7/optethgpiogregs.yml      | 20 +++++++++++++++++
 4 files changed, 65 insertions(+), 1 deletion(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
 create mode 100644 spec/build/bsps/arm/stm32h7/optethgpiogregs.yml

diff --git a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
index 46475f4316..b9dac6d7f9 100644
--- a/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
+++ b/bsps/arm/stm32h7/start/stm32h7-hal-eth.c
@@ -31,10 +31,12 @@
 
 #include <stm32h7/hal.h>
 
+#include <bspopts.h>
+
 static const stm32h7_gpio_config gpiog = {
   .regs = GPIOG,
   .config = {
-    .Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13,
+    .Pin = STM32H7_ETH_GPIOG_PINS,
     .Mode = GPIO_MODE_AF_PP,
     .Pull = GPIO_NOPULL,
     .Speed = GPIO_SPEED_FREQ_LOW,
@@ -64,6 +66,21 @@ static const stm32h7_gpio_config gpioa = {
   }
 };
 
+#ifdef STM32H7_ETH_GPIOB_PINS
+
+static const stm32h7_gpio_config gpiob = {
+  .regs = GPIOB,
+  .config = {
+    .Pin = STM32H7_ETH_GPIOB_PINS,
+    .Mode = GPIO_MODE_AF_PP,
+    .Pull = GPIO_NOPULL,
+    .Speed = GPIO_SPEED_FREQ_LOW,
+    .Alternate = GPIO_AF11_ETH
+  }
+};
+
+#endif
+
 void
 HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
 {
@@ -73,4 +90,7 @@ HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
   stm32h7_gpio_init(&gpiog);
   stm32h7_gpio_init(&gpioc);
   stm32h7_gpio_init(&gpioa);
+#ifdef STM32H7_ETH_GPIOB_PINS
+  stm32h7_gpio_init(&gpiob);
+#endif
 }
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml b/spec/build/bsps/arm/stm32h7/grp.yml
index 2147cdec88..a7e7affa05 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -83,6 +83,10 @@ links:
   uid: optusart3gpioregs
 - role: build-dependency
   uid: optvariant
+- role: build-dependency
+  uid: optethgpiogregs
+- role: build-dependency
+  uid: optethgpiobregs
 - role: build-dependency
   uid: ../../optconsolebaud
 - role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
new file mode 100644
index 0000000000..d9898cbc79
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml
@@ -0,0 +1,20 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: null
+default-by-family: []
+default-by-variant:
+- value: GPIO_PIN_13
+  variants:
+  - arm/nucleo-h743zi
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_ETH_GPIOB_PINS
+description: |
+  GPIO B pins used for the ETH pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
diff --git a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml
new file mode 100644
index 0000000000..6a79082927
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml
@@ -0,0 +1,20 @@
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+default: ( GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 )
+default-by-family: []
+default-by-variant:
+- value: ( GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 )
+  variants:
+  - arm/nucleo-h743zi
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_ETH_GPIOG_PINS
+description: |
+  GPIO G pins used for the ETH pin configuration.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
-- 
2.30.2