[PATCH] Basic lwIP for STM32H7 BSP

Sebastian Huber sebastian.huber at embedded-brains.de
Mon Mar 22 10:43:40 UTC 2021

On 03/02/2021 14:50, Robin Müller wrote:

> The following link contains more theoretical information about why 
> these sections were placed at these addresses: 
> https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices 
> <https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices>
> Kind Regards
> Robin
> On Wed, 3 Feb 2021 at 14:44, Robin Müller <robin.mueller.m at gmail.com 
> <mailto:robin.mueller.m at gmail.com>> wrote:
>     The DMA descriptors need to be placed at the start of the SRAM3
>     and need to be aligned in a certain way. The RX buffer will take
>     up the first (slightly less than) 16 kB of SRAM3 but needs to be
>     placed
>     behind the DMA descriptors. It also needs to be placed in a way
>     that the MPU configuration required for the DMA descriptors will
>     not do something with the RX buffers.
>     In the example provided by STM32, the first 256 bytes are
>     configured by MPU Config.
I had a look at the FAQ and the manual. Currently, we use the SRAM1 for 
the .nocache area. This is in the D2 domain. The Ethernet module is in 
the D2 domain. I am not sure why you have to change this to the smaller 
SRAM3? The libbsd driver works well with the current setting.

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