[PATCH] eng: Add register block specification types

Sebastian Huber sebastian.huber at embedded-brains.de
Mon Sep 13 06:38:44 UTC 2021



On 12/09/2021 03:32, Chris Johns wrote:
> On 11/9/21 12:41 am, Sebastian Huber wrote:
>> A register block may be used to specify the memory-mapped interface to
>> the hardware.  Register blocks consist of register block members.
>> Register block members are either instances of registers or instances of
>> other register blocks.  Registers consists of bit fields.
> 
> I feel this is for generation of headers of devices for drivers. Is this correct?

Yes, see for example:

https://git.rtems.org/sebh/rtems.git/tree/bsps/include/grlib/gptimer-regs.h?h=qual-35

> 
> What bus interface API you are considering mapping this specification too?

Since we don't have a bus interface API in RTEMS I used something simple:

https://git.rtems.org/sebh/rtems.git/tree/bsps/sparc/include/grlib/io.h?h=qual-35

> 
> I do not know the purpose of this addition and the long term effect of this
> being formalised like this.

The purpose is a machine readable specification of the hardware 
interfaces in terms of register blocks, registers, and bit fields.

I used a similar approach to generate the header files for the AArch32 
and AArch64 system registers:

https://git.rtems.org/rtems/tree/cpukit/score/cpu/arm/include/rtems/score/aarch32-system-registers.h

https://git.rtems.org/rtems/tree/cpukit/score/cpu/aarch64/include/rtems/score/aarch64-system-registers.h

This approach is not limited to memory mapped register blocks.

A machine readable hardware interface specification gives you a lot of 
flexibility. The labor intensive work is the first step, from a hand 
written manual to the specification items. If you have a better format 
in the future, it would be easy to convert the files with a small Python 
script.

> 
>> Update #3715.
> 
> I could not see this topic in the list for that ticket. I prefer that list stays
> as it is.

This register block specification format specification belongs to 
"Definition of data model and format actually used for the project".

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