[PATCH rtems-lwip v1 7/9] rtemslwip: Add zynqmp xilinx adapter code
Kinsey Moore
kinsey.moore at oarcorp.com
Fri Jul 1 22:31:10 UTC 2022
---
rtemslwip/include/arch/eth_lwip_default.h | 0
rtemslwip/include/bspconfig.h | 0
rtemslwip/xilinx/FreeRTOS.h | 38 +++++++
rtemslwip/xilinx/semphr.h | 0
rtemslwip/xilinx/sleep.h | 34 ++++++
rtemslwip/xilinx/timers.h | 0
rtemslwip/xilinx/xil_printf.h | 33 ++++++
rtemslwip/xilinx/xil_smc.h | 0
rtemslwip/xilinx/xil_spinlock.h | 0
rtemslwip/xilinx/xpseudo_asm.h | 33 ++++++
rtemslwip/zynqmp/lwipopts.h | 121 ++++++++++++++++++++++
rtemslwip/zynqmp/xemacps_g.c | 79 ++++++++++++++
rtemslwip/zynqmp/xil_shims.c | 91 ++++++++++++++++
rtemslwip/zynqmp/xlwipconfig.h | 38 +++++++
rtemslwip/zynqmp/xparameters.h | 113 ++++++++++++++++++++
rtemslwip/zynqmp/xparameters_ps.h | 68 ++++++++++++
rtemslwip/zynqmp/xtopology_g.c | 67 ++++++++++++
rtemslwip/zynqmp_hardware/netstart.c | 66 ++++++++++++
rtemslwip/zynqmp_qemu/netstart.c | 66 ++++++++++++
19 files changed, 847 insertions(+)
create mode 100644 rtemslwip/include/arch/eth_lwip_default.h
create mode 100644 rtemslwip/include/bspconfig.h
create mode 100644 rtemslwip/xilinx/FreeRTOS.h
create mode 100644 rtemslwip/xilinx/semphr.h
create mode 100644 rtemslwip/xilinx/sleep.h
create mode 100644 rtemslwip/xilinx/timers.h
create mode 100644 rtemslwip/xilinx/xil_printf.h
create mode 100644 rtemslwip/xilinx/xil_smc.h
create mode 100644 rtemslwip/xilinx/xil_spinlock.h
create mode 100644 rtemslwip/xilinx/xpseudo_asm.h
create mode 100644 rtemslwip/zynqmp/lwipopts.h
create mode 100644 rtemslwip/zynqmp/xemacps_g.c
create mode 100644 rtemslwip/zynqmp/xil_shims.c
create mode 100644 rtemslwip/zynqmp/xlwipconfig.h
create mode 100644 rtemslwip/zynqmp/xparameters.h
create mode 100644 rtemslwip/zynqmp/xparameters_ps.h
create mode 100644 rtemslwip/zynqmp/xtopology_g.c
create mode 100644 rtemslwip/zynqmp_hardware/netstart.c
create mode 100644 rtemslwip/zynqmp_qemu/netstart.c
diff --git a/rtemslwip/include/arch/eth_lwip_default.h b/rtemslwip/include/arch/eth_lwip_default.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/include/bspconfig.h b/rtemslwip/include/bspconfig.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/xilinx/FreeRTOS.h b/rtemslwip/xilinx/FreeRTOS.h
new file mode 100644
index 0000000..c63d4fa
--- /dev/null
+++ b/rtemslwip/xilinx/FreeRTOS.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef FREERTOS_H
+#define FREERTOS_H
+
+typedef long BaseType_t;
+
+BaseType_t xPortInstallInterruptHandler(
+ uint8_t ucInterruptID,
+ XInterruptHandler pxHandler,
+ void *pvCallBackRef
+);
+
+#endif /* FREERTOS_H */
diff --git a/rtemslwip/xilinx/semphr.h b/rtemslwip/xilinx/semphr.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/xilinx/sleep.h b/rtemslwip/xilinx/sleep.h
new file mode 100644
index 0000000..4a4fbdf
--- /dev/null
+++ b/rtemslwip/xilinx/sleep.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef SLEEP_H
+#define SLEEP_H
+
+int usleep( ULONG useconds );
+
+unsigned int sleep( u32 seconds );
+
+#endif
diff --git a/rtemslwip/xilinx/timers.h b/rtemslwip/xilinx/timers.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/xilinx/xil_printf.h b/rtemslwip/xilinx/xil_printf.h
new file mode 100644
index 0000000..3da55bd
--- /dev/null
+++ b/rtemslwip/xilinx/xil_printf.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef XIL_PRINTF_H
+#define XIL_PRINTF_H
+
+#define xil_printf( args ... ) printf( args )
+#define print( args ... ) printf( args )
+
+#endif
diff --git a/rtemslwip/xilinx/xil_smc.h b/rtemslwip/xilinx/xil_smc.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/xilinx/xil_spinlock.h b/rtemslwip/xilinx/xil_spinlock.h
new file mode 100644
index 0000000..e69de29
diff --git a/rtemslwip/xilinx/xpseudo_asm.h b/rtemslwip/xilinx/xpseudo_asm.h
new file mode 100644
index 0000000..cb51433
--- /dev/null
+++ b/rtemslwip/xilinx/xpseudo_asm.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef XPSEUDO_ASM_H
+#define XPSEUDO_ASM_H
+
+#include <rtems/score/cpu.h>
+#define dsb() _AARCH64_Data_synchronization_barrier()
+
+#endif
diff --git a/rtemslwip/zynqmp/lwipopts.h b/rtemslwip/zynqmp/lwipopts.h
new file mode 100644
index 0000000..c7c2dde
--- /dev/null
+++ b/rtemslwip/zynqmp/lwipopts.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __LWIPOPTS_H__
+#define __LWIPOPTS_H__
+
+#define SYS_LIGHTWEIGHT_PROT 1
+
+#define NO_SYS 0
+#define LWIP_SOCKET 1
+#define LWIP_COMPAT_SOCKETS 0
+#define LWIP_NETCONN 1
+
+#define LWIP_ARP 1
+#define LWIP_NETIF_API 1
+#define LWIP_IPV6 1
+#define LWIP_IPV4 1
+#define LWIP_TIMEVAL_PRIVATE 0
+#define LWIP_DNS 1
+
+#define LWIP_CALLBACK_API 1
+
+#define MEM_ALIGNMENT 64
+#define MEM_SIZE 2 * 1024 * 1024
+#define MEMP_NUM_PBUF 32
+#define MEMP_NUM_UDP_PCB 4
+#define MEMP_NUM_TCP_PCB 32
+#define MEMP_NUM_TCP_PCB_LISTEN 8
+#define MEMP_NUM_TCP_SEG 256
+
+#define PBUF_POOL_SIZE 256
+#define PBUF_POOL_BUFSIZE 1600
+#define PBUF_LINK_HLEN 16
+
+#define ARP_TABLE_SIZE 10
+#define ARP_QUEUEING 1
+
+#define ICMP_TTL 255
+
+#define IP_OPTIONS 1
+#define IP_FORWARD 0
+#define IP_REASSEMBLY 1
+#define IP_FRAG 1
+#define IP_REASS_BUFSIZE 5760
+#define IP_FRAG_MAX_MTU 1500
+#define IP_DEFAULT_TTL 255
+#define LWIP_CHKSUM_ALGORITHM 3
+
+#define LWIP_UDP 1
+#define UDP_TTL 255
+
+#define LWIP_TCP 1
+#define TCP_MSS 1576
+#define TCP_SND_BUF 16 * 1024
+#define TCP_WND 6 * 1024
+#define TCP_TTL 255
+#define TCP_MAXRTX 12
+#define TCP_SYNMAXRTX 4
+#define TCP_QUEUE_OOSEQ 1
+#define TCP_SND_QUEUELEN 16 * TCP_SND_BUF / TCP_MSS
+#define CHECKSUM_GEN_TCP 1
+#define CHECKSUM_GEN_UDP 1
+#define CHECKSUM_GEN_IP 1
+#define CHECKSUM_CHECK_TCP 1
+#define CHECKSUM_CHECK_UDP 1
+#define CHECKSUM_CHECK_IP 1
+
+#define TCP_TMR_INTERVAL 250
+#define TCP_FAST_INTERVAL 250
+#define TCP_SLOW_INTERVAL 500
+
+#define NO_SYS_NO_TIMERS 1
+#define MEMP_SEPARATE_POOLS 1
+#define MEMP_NUM_FRAG_PBUF 256
+#define IP_OPTIONS_ALLOWED 0
+#define TCP_OVERSIZE TCP_MSS
+#define LWIP_COMPAT_MUTEX 0
+#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 1
+
+#define LWIP_DHCP 1
+#define DHCP_DOES_ARP_CHECK 1
+
+#define DBG_TYPES_ON DBG_LEVEL_WARNING
+
+#define LWIP_STATS 0
+#define LWIP_STATS_DISPLAY 0
+#define LWIP_STATS_POSIX 0
+
+#define CONFIG_LINKSPEED_AUTODETECT 1
+#define TCPIP_MBOX_SIZE 20
+#define DEFAULT_TCP_RECVMBOX_SIZE 20
+#define DEFAULT_ACCEPTMBOX_SIZE 5
+
+#define tskIDLE_PRIORITY RTEMS_MAXIMUM_PRIORITY
+#define portTICK_RATE_MS ( rtems_clock_get_ticks_per_second() * 1000 )
+#define vTaskDelay( x ) sys_arch_delay( x )
+
+#endif /* __LWIPOPTS_H__ */
diff --git a/rtemslwip/zynqmp/xemacps_g.c b/rtemslwip/zynqmp/xemacps_g.c
new file mode 100644
index 0000000..3fc003b
--- /dev/null
+++ b/rtemslwip/zynqmp/xemacps_g.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "xparameters.h"
+#include "xemacps.h"
+
+/*
+ * The configuration table for devices
+ */
+
+XEmacPs_Config XEmacPs_ConfigTable[ XPAR_XEMACPS_NUM_INSTANCES ] = {
+ {
+ XPAR_PSU_ETHERNET_3_DEVICE_ID,
+ XPAR_PSU_ETHERNET_3_BASEADDR,
+ XPAR_PSU_ETHERNET_3_IS_CACHE_COHERENT,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV0,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV1,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV0,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV1,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV0,
+ XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV1
+ },
+ {
+ XPAR_PSU_ETHERNET_2_DEVICE_ID,
+ XPAR_PSU_ETHERNET_2_BASEADDR,
+ XPAR_PSU_ETHERNET_2_IS_CACHE_COHERENT,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_1000MBPS_DIV0,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_1000MBPS_DIV1,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_100MBPS_DIV0,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_100MBPS_DIV1,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_10MBPS_DIV0,
+ XPAR_PSU_ETHERNET_2_ENET_SLCR_10MBPS_DIV1
+ },
+ {
+ XPAR_PSU_ETHERNET_1_DEVICE_ID,
+ XPAR_PSU_ETHERNET_1_BASEADDR,
+ XPAR_PSU_ETHERNET_1_IS_CACHE_COHERENT,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_1000MBPS_DIV0,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_1000MBPS_DIV1,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_100MBPS_DIV0,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_100MBPS_DIV1,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_10MBPS_DIV0,
+ XPAR_PSU_ETHERNET_1_ENET_SLCR_10MBPS_DIV1
+ },
+ {
+ XPAR_PSU_ETHERNET_0_DEVICE_ID,
+ XPAR_PSU_ETHERNET_0_BASEADDR,
+ XPAR_PSU_ETHERNET_0_IS_CACHE_COHERENT,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_1000MBPS_DIV0,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_1000MBPS_DIV1,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_100MBPS_DIV0,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_100MBPS_DIV1,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_10MBPS_DIV0,
+ XPAR_PSU_ETHERNET_0_ENET_SLCR_10MBPS_DIV1
+ },
+};
diff --git a/rtemslwip/zynqmp/xil_shims.c b/rtemslwip/zynqmp/xil_shims.c
new file mode 100644
index 0000000..5284ded
--- /dev/null
+++ b/rtemslwip/zynqmp/xil_shims.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "xil_mmu.h"
+#include <rtems/rtems/cache.h>
+#include <rtems/rtems/intr.h>
+#include <libcpu/mmu-vmsav8-64.h>
+
+#define TWO_MB (2*1024*1024)
+#define ONE_GB (1024*1024*1024)
+
+/*
+ * When altering memory attributes, Xilinx sets them for differing memory sizes
+ * depending on what area of memory they are in. Any attribute changes below 4GB
+ * apply to 2MB chunks while any changes above 4GB apply to 1GB chunks.
+ */
+void Xil_SetTlbAttributes( UINTPTR Addr, u64 attrib )
+{
+ rtems_status_code sc;
+ sc = aarch64_mmu_map(
+ Addr,
+ Addr < 0x100000000 ? TWO_MB : ONE_GB,
+ attrib
+ );
+ if ( sc != RTEMS_SUCCESSFUL ) {
+ printf("Failed setting TLB attribs on ptr %p: 0x%lx\n", Addr, attrib);
+ }
+}
+
+#include "FreeRTOS.h"
+
+/*
+ * XInterruptHandler function pointer signature just happens to exactly match
+ * rtems_interrupt_handler
+ */
+BaseType_t xPortInstallInterruptHandler(
+ uint8_t ucInterruptID,
+ XInterruptHandler pxHandler,
+ void *pvCallBackRef
+)
+{
+ rtems_status_code sc = rtems_interrupt_handler_install(
+ ucInterruptID,
+ "CGEM Handler",
+ RTEMS_INTERRUPT_UNIQUE,
+ pxHandler,
+ pvCallBackRef
+ );
+
+ return sc;
+}
+
+/* Enable the interrupt */
+void XScuGic_EnableIntr ( u32 DistBaseAddress, u32 Int_Id )
+{
+ rtems_interrupt_vector_enable( Int_Id );
+}
+
+/* Disable the interrupt */
+void XScuGic_DisableIntr ( u32 DistBaseAddress, u32 Int_Id )
+{
+ rtems_interrupt_vector_disable( Int_Id );
+}
+
+void Xil_DCacheInvalidateRange( INTPTR adr, INTPTR len )
+{
+ rtems_cache_invalidate_multiple_data_lines( (const void *) adr, len );
+}
diff --git a/rtemslwip/zynqmp/xlwipconfig.h b/rtemslwip/zynqmp/xlwipconfig.h
new file mode 100644
index 0000000..8144153
--- /dev/null
+++ b/rtemslwip/zynqmp/xlwipconfig.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __XLWIPCONFIG_H_
+#define __XLWIPCONFIG_H_
+
+#define XLWIP_CONFIG_INCLUDE_GEM 1
+#define XLWIP_CONFIG_EMAC_NUMBER 0
+#define XLWIP_CONFIG_N_TX_DESC 64
+#define XLWIP_CONFIG_N_RX_DESC 64
+
+#define XLWIP_CONFIG_N_TX_COALESCE 1
+#define XLWIP_CONFIG_N_RX_COALESCE 1
+
+#endif
diff --git a/rtemslwip/zynqmp/xparameters.h b/rtemslwip/zynqmp/xparameters.h
new file mode 100644
index 0000000..053a154
--- /dev/null
+++ b/rtemslwip/zynqmp/xparameters.h
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef XPARAMETERS_H
+#define XPARAMETERS_H
+
+/* Platform specific definitions */
+#define PLATFORM_ZYNQMP
+
+/* Definitions for driver EMACPS */
+#define XPAR_XEMACPS_NUM_INSTANCES 4
+
+/* Definitions for peripheral PSU_ETHERNET_0 */
+#define XPAR_PSU_ETHERNET_0_DEVICE_ID 0
+#define XPAR_PSU_ETHERNET_0_BASEADDR 0xFF0B0000
+#define XPAR_PSU_ETHERNET_0_ENET_CLK_FREQ_HZ 124998749
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_1000MBPS_DIV0 12
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_1000MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_100MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_100MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_10MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_0_ENET_SLCR_10MBPS_DIV1 10
+
+/* Definitions for peripheral PSU_ETHERNET_1 */
+#define XPAR_PSU_ETHERNET_1_DEVICE_ID 1
+#define XPAR_PSU_ETHERNET_1_BASEADDR 0xFF0C0000
+#define XPAR_PSU_ETHERNET_1_ENET_CLK_FREQ_HZ 124998749
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_1000MBPS_DIV0 12
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_1000MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_100MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_100MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_10MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_1_ENET_SLCR_10MBPS_DIV1 10
+
+/* Definitions for peripheral PSU_ETHERNET_2 */
+#define XPAR_PSU_ETHERNET_2_DEVICE_ID 1
+#define XPAR_PSU_ETHERNET_2_BASEADDR 0xFF0D0000
+#define XPAR_PSU_ETHERNET_2_ENET_CLK_FREQ_HZ 124998749
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_1000MBPS_DIV0 12
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_1000MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_100MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_100MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_10MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_2_ENET_SLCR_10MBPS_DIV1 10
+
+/******************************************************************/
+#define XPAR_PSU_ETHERNET_0_IS_CACHE_COHERENT 0
+#define XPAR_XEMACPS_0_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ETHERNET_0_REF_CLK GEM0_REF
+#define XPAR_PSU_ETHERNET_1_IS_CACHE_COHERENT 0
+#define XPAR_XEMACPS_1_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ETHERNET_1_REF_CLK GEM1_REF
+#define XPAR_PSU_ETHERNET_2_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ETHERNET_2_REF_CLK GEM2_REF
+#define XPAR_XEMACPS_0_ENET_CLK_FREQ_HZ 124998749
+#define XPAR_XEMACPS_0_ENET_SLCR_1000Mbps_DIV1 1
+#define XPAR_XEMACPS_0_ENET_SLCR_100Mbps_DIV1 1
+
+/* Definitions for peripheral PSU_ETHERNET_3 */
+#define XPAR_PSU_ETHERNET_3_DEVICE_ID 0
+#define XPAR_PSU_ETHERNET_3_BASEADDR 0xFF0E0000
+#define XPAR_PSU_ETHERNET_3_ENET_CLK_FREQ_HZ 124998749
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV0 12
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_1000MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_100MBPS_DIV1 1
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV0 60
+#define XPAR_PSU_ETHERNET_3_ENET_SLCR_10MBPS_DIV1 10
+#define XPAR_PSU_ETHERNET_3_IS_CACHE_COHERENT 0
+#define XPAR_PSU_ETHERNET_3_REF_CLK GEM3_REF
+
+/* Canonical definitions for peripheral PSU_ETHERNET_0 */
+#define XPAR_XEMACPS_0_DEVICE_ID XPAR_PSU_ETHERNET_0_DEVICE_ID
+#define XPAR_XEMACPS_0_BASEADDR 0xFF0B0000
+
+/* Canonical definitions for peripheral PSU_ETHERNET_1 */
+#define XPAR_XEMACPS_1_DEVICE_ID XPAR_PSU_ETHERNET_1_DEVICE_ID
+#define XPAR_XEMACPS_1_BASEADDR 0xFF0C0000
+
+/* Canonical definitions for peripheral PSU_ETHERNET_2 */
+#define XPAR_XEMACPS_2_DEVICE_ID XPAR_PSU_ETHERNET_2_DEVICE_ID
+#define XPAR_XEMACPS_2_BASEADDR 0xFF0D0000
+
+/* Canonical definitions for peripheral PSU_ETHERNET_3 */
+#define XPAR_XEMACPS_3_DEVICE_ID XPAR_PSU_ETHERNET_3_DEVICE_ID
+#define XPAR_XEMACPS_3_BASEADDR 0xFF0E0000
+
+#define XPAR_SCUGIC_0_DIST_BASEADDR 0xF9010000U
+
+#endif
diff --git a/rtemslwip/zynqmp/xparameters_ps.h b/rtemslwip/zynqmp/xparameters_ps.h
new file mode 100644
index 0000000..427ae77
--- /dev/null
+++ b/rtemslwip/zynqmp/xparameters_ps.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _XPARAMETERS_PS_H_
+#define _XPARAMETERS_PS_H_
+
+#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID
+#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID
+#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID
+#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID
+#define XPAR_XEMACPS_2_INTR XPS_GEM2_INT_ID
+#define XPAR_XEMACPS_2_WAKE_INTR XPS_GEM2_WAKE_INT_ID
+#define XPAR_XEMACPS_3_INTR XPS_GEM3_INT_ID
+#define XPAR_XEMACPS_3_WAKE_INTR XPS_GEM3_WAKE_INT_ID
+
+#define XPS_SYS_CTRL_BASEADDR 0xFF180000U
+
+#define XPS_GEM0_INT_ID ( 57U + 32U )
+#define XPS_GEM0_WAKE_INT_ID ( 58U + 32U )
+#define XPS_GEM1_INT_ID ( 59U + 32U )
+#define XPS_GEM1_WAKE_INT_ID ( 60U + 32U )
+#define XPS_GEM2_INT_ID ( 61U + 32U )
+#define XPS_GEM2_WAKE_INT_ID ( 62U + 32U )
+#define XPS_GEM3_INT_ID ( 63U + 32U )
+#define XPS_GEM3_WAKE_INT_ID ( 64U + 32U )
+
+#define XPAR_PSU_ETHERNET_0_INTR XPS_GEM0_INT_ID
+#define XPAR_PSU_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_1_INTR XPS_GEM1_INT_ID
+#define XPAR_PSU_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_2_INTR XPS_GEM2_INT_ID
+#define XPAR_PSU_ETHERNET_2_WAKE_INTR XPS_GEM2_WAKE_INT_ID
+#define XPAR_PSU_ETHERNET_3_INTR XPS_GEM3_INT_ID
+#define XPAR_PSU_ETHERNET_3_WAKE_INTR XPS_GEM3_WAKE_INT_ID
+
+#define XPAR_PSU_ETHERNET_0_INTERRUPT_ID 0x4039U
+#define XPAR_PSU_ETHERNET_0_WAKE_INTERRUPT_ID 0x4039U
+#define XPAR_PSU_ETHERNET_1_INTERRUPT_ID 0x403BU
+#define XPAR_PSU_ETHERNET_1_WAKE_INTERRUPT_ID 0x403BU
+#define XPAR_PSU_ETHERNET_2_INTERRUPT_ID 0x403DU
+#define XPAR_PSU_ETHERNET_2_WAKE_INTERRUPT_ID 0x403DU
+#define XPAR_PSU_ETHERNET_3_INTERRUPT_ID 0x403FU
+#define XPAR_PSU_ETHERNET_3_WAKE_INTERRUPT_ID 0x403FU
+
+#endif
diff --git a/rtemslwip/zynqmp/xtopology_g.c b/rtemslwip/zynqmp/xtopology_g.c
new file mode 100644
index 0000000..35729b1
--- /dev/null
+++ b/rtemslwip/zynqmp/xtopology_g.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "netif/xtopology.h"
+#include "xparameters.h"
+#include "xparameters_ps.h"
+#include <netif/xemacpsif.h>
+
+struct xtopology_t xtopology[] = {
+ {
+ ZYNQMP_EMACPS_3_BASEADDR,
+ xemac_type_emacps,
+ 0x0,
+ 0x0,
+ 0xF8F00100,
+ XPS_GEM3_INT_ID,
+ },
+ {
+ ZYNQMP_EMACPS_2_BASEADDR,
+ xemac_type_emacps,
+ 0x0,
+ 0x0,
+ 0xF8F00100,
+ XPS_GEM2_INT_ID,
+ },
+ {
+ ZYNQMP_EMACPS_1_BASEADDR,
+ xemac_type_emacps,
+ 0x0,
+ 0x0,
+ 0xF8F00100,
+ XPS_GEM1_INT_ID,
+ },
+ {
+ ZYNQMP_EMACPS_0_BASEADDR,
+ xemac_type_emacps,
+ 0x0,
+ 0x0,
+ 0xF8F00100,
+ XPS_GEM0_INT_ID,
+ },
+};
+
+int xtopology_n_emacs = 4;
diff --git a/rtemslwip/zynqmp_hardware/netstart.c b/rtemslwip/zynqmp_hardware/netstart.c
new file mode 100644
index 0000000..01e392e
--- /dev/null
+++ b/rtemslwip/zynqmp_hardware/netstart.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <netstart.h>
+#include "netif/xadapter.h"
+#include "xparameters.h"
+#include <lwip/tcpip.h>
+
+int start_networking(
+ struct netif *net_interface,
+ ip_addr_t *ipaddr,
+ ip_addr_t *netmask,
+ ip_addr_t *gateway,
+ unsigned char *mac_ethernet_address
+)
+{
+ tcpip_init( NULL, NULL );
+
+ if ( !xemac_add(
+ net_interface,
+ ipaddr,
+ netmask,
+ gateway,
+ mac_ethernet_address,
+ XPAR_PSU_ETHERNET_3_BASEADDR
+ ) ) {
+ return 1;
+ }
+
+ netif_set_default( net_interface );
+
+ netif_set_up( net_interface );
+
+ sys_thread_new(
+ "xemacif_input_thread",
+ ( void ( * )( void * ) )xemacif_input_thread,
+ net_interface,
+ 1024,
+ DEFAULT_THREAD_PRIO
+ );
+
+ return 0;
+}
diff --git a/rtemslwip/zynqmp_qemu/netstart.c b/rtemslwip/zynqmp_qemu/netstart.c
new file mode 100644
index 0000000..d19b36c
--- /dev/null
+++ b/rtemslwip/zynqmp_qemu/netstart.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
+ * Written by Kinsey Moore <kinsey.moore at oarcorp.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <netstart.h>
+#include "netif/xadapter.h"
+#include "xparameters.h"
+#include <lwip/tcpip.h>
+
+int start_networking(
+ struct netif *net_interface,
+ ip_addr_t *ipaddr,
+ ip_addr_t *netmask,
+ ip_addr_t *gateway,
+ unsigned char *mac_ethernet_address
+)
+{
+ tcpip_init( NULL, NULL );
+
+ if ( !xemac_add(
+ net_interface,
+ ipaddr,
+ netmask,
+ gateway,
+ mac_ethernet_address,
+ XPAR_PSU_ETHERNET_0_BASEADDR
+ ) ) {
+ return 1;
+ }
+
+ netif_set_default( net_interface );
+
+ netif_set_up( net_interface );
+
+ sys_thread_new(
+ "xemacif_input_thread",
+ ( void ( * )( void * ) )xemacif_input_thread,
+ net_interface,
+ 1024,
+ DEFAULT_THREAD_PRIO
+ );
+
+ return 0;
+}
--
2.30.2
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