[PATCH v2 1/2] bsp/riscv: Work area size based on stack pointer

Joel Sherrill joel at rtems.org
Thu Jul 14 13:25:54 UTC 2022


Thanks for this. The Gaisler code is in transition to the 2 paragraph BSD
license, it appears that the new file has missed the SPDX marker at
the top. Also please ensure the license is formatted like the others. From
my quick review, it looks like the line breaks are in different places from
here:

https://git.rtems.org/rtems/tree/cpukit/include/aio.h

That one is based on the script I used to change them in bulk. If there
are discrepancies you spot on other code, feel free to let me know.
Changing all this has been quite tedious and it is easy to miss things.

--joel

On Thu, Jul 14, 2022 at 6:22 AM Daniel Cederman <cederman at gaisler.com>
wrote:

> From: Martin Aberg <maberg at gaisler.com>
>
> Remember the initial stack pointer in start.S. It can later be used to
> determine top of RAM.
> ---
>  bsps/riscv/include/bsp/start.h                | 65 +++++++++++++++++++
>  .../shared/start/bspgetworkarea-fromstack.c   | 53 +++++++++++++++
>  bsps/riscv/shared/start/start.S               | 25 +++++++
>  3 files changed, 143 insertions(+)
>  create mode 100644 bsps/riscv/include/bsp/start.h
>  create mode 100644 bsps/riscv/shared/start/bspgetworkarea-fromstack.c
>
> diff --git a/bsps/riscv/include/bsp/start.h
> b/bsps/riscv/include/bsp/start.h
> new file mode 100644
> index 0000000000..6c9d57d4ed
> --- /dev/null
> +++ b/bsps/riscv/include/bsp/start.h
> @@ -0,0 +1,65 @@
> +/**
> + * @file
> + *
> + * @ingroup RTEMSBSPsRISCVSharedStart
> + *
> + * @brief RISC-V start definitions.
> + */
> +
> +/*
> + * Copyright (c) 2021 Cobham Gaisler AB.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + * 1. Redistributions of source code must retain the above copyright
> + *    notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + *    notice, this list of conditions and the following disclaimer in the
> + *    documentation and/or other materials provided with the distribution.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
> + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
> PURPOSE
> + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
> + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
> CONSEQUENTIAL
> + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
> + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
> STRICT
> + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
> WAY
> + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
> + * SUCH DAMAGE.
> + */
> +
> +#ifndef LIBBSP_RISCV_SHARED_START_H
> +#define LIBBSP_RISCV_SHARED_START_H
> +
> +/**
> + * @defgroup RTEMSBSPsRISCVSharedStart Start Support
> + *
> + * @ingroup RTEMSBSPsRISCVShared
> + *
> + * @brief Start support.
> + *
> + * @{
> + */
> +
> +#include <stdint.h>
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> + * This variable is initialized by the first CPU entering the BSP start
> code.
> + * The value is the stack pointer at entry.
> + */
> +extern uintptr_t riscv_start_stack_pointer;
> +
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/** @} */
> +
> +#endif /* LIBBSP_RISCV_SHARED_START_H */
> diff --git a/bsps/riscv/shared/start/bspgetworkarea-fromstack.c
> b/bsps/riscv/shared/start/bspgetworkarea-fromstack.c
> new file mode 100644
> index 0000000000..6885a77dc0
> --- /dev/null
> +++ b/bsps/riscv/shared/start/bspgetworkarea-fromstack.c
> @@ -0,0 +1,53 @@
> +/*
> + *  This set of routines are the BSP specific initialization
> + *  support routines.
> + *
> + *  COPYRIGHT (c) 1989-2020.
> + *  On-Line Applications Research Corporation (OAR),
> + *  Cobham Gaisler AB.
> + *
> + *  The license and distribution terms for this file may be
> + *  found in the file LICENSE in this distribution or at
> + *  http://www.rtems.org/license/LICENSE.
> + */
> +
> +#include <bsp.h>
> +#include <bsp/start.h>
> +#include <bsp/bootcard.h>
> +
> +#include <rtems/sysinit.h>
> +
> +/*
> + *  These are provided by the linkcmds for ALL of the BSPs which use this
> file.
> + */
> +extern char WorkAreaBase[];
> +extern char RamEnd[];
> +
> +static Memory_Area _Memory_Areas[ 1 ];
> +
> +static void bsp_memory_initialize( void )
> +{
> +  char *end;
> +
> +  /* top of RAM inidicated by initial stack pointer */
> +  end = (char *) riscv_start_stack_pointer;
> +  if (end == 0) {
> +    /* fall back to linker symbol if not set */
> +    end = RamEnd;
> +  }
> +  _Memory_Initialize( &_Memory_Areas[ 0 ], WorkAreaBase, end );
> +}
> +
> +RTEMS_SYSINIT_ITEM(
> +  bsp_memory_initialize,
> +  RTEMS_SYSINIT_MEMORY,
> +  RTEMS_SYSINIT_ORDER_MIDDLE
> +);
> +
> +static const Memory_Information _Memory_Information =
> +  MEMORY_INFORMATION_INITIALIZER( _Memory_Areas );
> +
> +const Memory_Information *_Memory_Get( void )
> +{
> +  return &_Memory_Information;
> +}
> diff --git a/bsps/riscv/shared/start/start.S
> b/bsps/riscv/shared/start/start.S
> index 3702f8ac2f..21945a99f5 100644
> --- a/bsps/riscv/shared/start/start.S
> +++ b/bsps/riscv/shared/start/start.S
> @@ -35,6 +35,16 @@
>  #include <bsp/linker-symbols.h>
>  #include <bspopts.h>
>
> +#if __riscv_xlen == 32
> +#define PTR_ALIGN 2
> +#define PTR_SIZE 4
> +#define PTR_VALUE .word
> +#elif __riscv_xlen == 64
> +#define PTR_ALIGN 3
> +#define PTR_SIZE 8
> +#define PTR_VALUE .dword
> +#endif
> +
>  PUBLIC(_start)
>
>         .section        .bsp_start_text, "wax", @progbits
> @@ -60,6 +70,9 @@ SYM(_start):
>         LADDR   t0, _RISCV_Exception_handler
>         csrw    mtvec, t0
>
> +       /* Save stack pointer so it can mark end of work area later on */
> +       mv      t3, sp
> +
>         /* Load stack pointer and branch to secondary processor start if
> necessary */
>  #ifdef RTEMS_SMP
>         LADDR   sp, _ISR_Stack_area_begin
> @@ -75,6 +88,9 @@ SYM(_start):
>         LADDR   sp, _ISR_Stack_area_end
>  #endif
>
> +       LADDR   t0, riscv_start_stack_pointer
> +       SREG    t3, 0(t0)
> +
>  #ifdef BSP_START_COPY_FDT_FROM_U_BOOT
>         mv      a0, a1
>         call    bsp_fdt_copy
> @@ -146,3 +162,12 @@ SYM(_start):
>  #endif
>
>  #endif /* RTEMS_SMP */
> +
> +       .section        .data, "aw"
> +       .align  PTR_ALIGN
> +
> +       .globl  riscv_start_stack_pointer
> +       .type   riscv_start_stack_pointer, @object
> +       .size   riscv_start_stack_pointer, PTR_SIZE
> +riscv_start_stack_pointer:
> +       PTR_VALUE       0
> --
> 2.34.1
>
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