[PATCH] Arm/raspberrypi.h: Added relevant headers for the bcm2711
Noor Aman
nooraman5718 at gmail.com
Fri Jul 22 15:09:22 UTC 2022
Hey Alan, Sorry for the late reply.
So here's my plan. I initially thought of editing the raspberrypi.h and
making it compatible for every RPi bsp. But I think I'll just be working on
Aarch64 only. So I'll define everything related to bcm2711, not bcm283x.
And After I complete with RPi4 bsp, we can work on how to merge both the
headers.
> Following up with some additional thoughts:
>
I have already forked rtems github repo on my profile.
https://github.com/0xNoor/rtems .Here's the link. I've added 2 additional
branches named as noor-dev and noor-master. noor-master server as the
backup branch just in case i break anything in my noor-dev branch. I keep
on updating the branches with RTEMS:master branch.
So every time I have a question, I just need to point to the part of the
repo? I think that would be ok to do. So do I need to do this for getting a
review too?
And Thanks for rt-thread link. It solves my issue for mailbox and others
too :)
On Fri, 22 Jul 2022 at 18:24, Alan Cudmore <alan.cudmore at gmail.com> wrote:
> Hi Noor,
>
> Following up with some additional thoughts:
>
> - My approach for development for this BSP would be to focus on
> getting it working on a GitHub fork of the RTEMS repo. It could be messy
> while you are getting it working, but that is the fun part, in my opinion.
> If you need help or advice, you could send a message pointing us to parts
> of your repository.
> - Once you have it working, we can figure out the best way to
> integrate it. Again, in my opinion, once you have something working, moving
> code around and reformatting is the easy part!
> - Finally, you can submit the patches of the working BSP.
>
> Does this sound like a reasonable to everyone? It may not make sense for
> the community to review patches that may end up changing as the BSP is
> developed.
>
>
>
> I am taking a similar approach.. I have been slowly working on a BSP for
> the Kendryte K210 RISC-V processor. I have it working now, but soon I need
> to get input for the best way to integrate it with the existing RISC-V BSPs.
>
>
>
> Thanks for working on this!
>
> Alan
>
>
>
>
>
> *From: *Alan Cudmore <alan.cudmore at gmail.com>
> *Sent: *Thursday, July 21, 2022 10:59 PM
> *To: *joel at rtems.org
> *Cc: *Noor Aman <nooraman5718 at gmail.com>; rtems-devel at rtems.org
> <devel at rtems.org>; Hesham Moustafa <heshamelmatary at gmail.com>; William
> Moore <WKMoore at gmail.com>
> *Subject: *Re: [PATCH] Arm/raspberrypi.h: Added relevant headers for the
> bcm2711
>
>
>
> Joel, I don't think we need to commit the file now.
>
> Some suggestions:
>
> - Let's not put RPI2 or RPI3 defines or ifdefs in the file if it's only
> going to be for the Aarch64 RPI4 BSP
>
> - If it will be only used for the RPI4, it might be confusing to have the
> BCM2836 defines rather than using BCM2711
>
> - If we really can share most of the defines between the RPI2 and RPI4
> bsps, is there any way we can have a common include in the bsps/shared
> directory? Something like bcm_soc.h that has common defines for all
> raspberry Pi models? That would require changes to the Raspberry Pi 1 and 2
> BSPs but it would avoid duplication of code.
>
> I also wonder if we can end up taking advantage of shared drivers such as
> the pl011 serial driver.
>
>
>
> Another source of info that may be helpful is the RT-Thread RTOS. They
> have RPI 2, 3, and 4 BSPs. The RPI4 has 32 and 64 bit versions. In addition
> the RTOS is Apache 2.0 licensed, so that may be easier to re-use (Please
> correct me if I'm wrong on the license usage!)
>
>
> https://github.com/RT-Thread/rt-thread/tree/master/bsp/raspberry-pi/raspi4-64
>
>
>
> Thanks,
>
> Alan
>
>
>
> On Thu, Jul 21, 2022 at 2:01 PM Joel Sherrill <joel at rtems.org> wrote:
>
>
>
>
>
> On Thu, Jul 21, 2022 at 12:32 PM Noor Aman <nooraman5718 at gmail.com> wrote:
>
> I dont think this would be visible to any other application until or
> unless user explicitly include this header 'raspberrypi.h' in their
> application. And as of now, this header is only placed in
> bsps/arm/raspberrypi/includes.
>
>
>
> Sorry. My mistake. I was thinking it was in bsp.h. :(
>
>
>
> For my project I'm thinking of using this header with my project with
> bcm2711 addresses included. For my project, this header will go under
> bsps/aarch64/raspberrypi/includes. So I don't think this will create any
> problem for other BSPs.
>
>
>
> This will be ok. A file has to explicitly include it.
>
>
>
> If you think it is ready to commit, I'm happy to do it if Alan or someone
> else also acks.
>
>
>
> --joel
>
>
>
> On Thu, Jul 21, 2022, 10:16 PM Joel Sherrill <joel at rtems.org> wrote:
>
> This looks generally ok but is all this visible to any application that
> includes bsp.h?
>
>
>
> It might all need to be moved into a separate header to avoid
> contaminating everyone's namespace.
>
>
>
> On Thu, Jul 21, 2022, 10:56 AM Noor Aman <nooraman5718 at gmail.com> wrote:
>
> A brief gist of what i found compatible with the older code
>
> ---COMPATIBLE HEADER---
>
> - BCM2835 timer
>
> - GPIO
>
> - AUX
>
> - GPU timer
>
> ---DIDNT CHECK---
>
> - SPI
>
> - I2C
>
> ---MINOR CHNAGE---
>
> - IRQ
>
> - FIQ
>
> ---NOT SURE ABOUT---
>
> - Watchdog
>
> - Power management
>
> - Mailbox register
>
>
>
> I didnt get any info about power management or watchdog or mailboxes. (It
> isnt in the BCM2835 Documention too I think??)
>
>
>
> And to answer your question Alan about if the Aarch64 would require a DTB
> or not which you asked me quite earlier. I can say now, you dont, because
> every address is defined here already so no need for the DTB.
>
>
>
>
>
>
>
> diff --git a/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
> b/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
>
> index eeb48c42f1..a4ed2a01d1 100644
> --- a/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
> +++ b/bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
> @@ -52,15 +52,23 @@
> * @{
> */
>
> -#if (BSP_IS_RPI2 == 1)
> - #define RPI_PERIPHERAL_BASE 0x3F000000
> +#if (RPI_BSP == RPI2)
> + #define RPI_PERIPHERAL_BASE 0X3F000000
> #define BASE_OFFSET 0X3F000000
> +
> +#elif (RPI_BSP == RPI4)
> + #define RPI_PERIPHERAL_BASE 0xFE000000
> + #define BASE_OFFSET 0xFE000000
> + #define RPI_PERIPHERAL_SIZE 0x01800000
> +
> #else
> #define RPI_PERIPHERAL_BASE 0x20000000
> #define BASE_OFFSET 0X5E000000
> +
> #endif
>
> -#define RPI_PERIPHERAL_SIZE 0x01000000
> +#ifndef RPI_PERIPHERAL_SIZE
> +#define RPI_PERIPHERAL_SIZE 0x01000000
>
> /**
> * @name Bus to Physical address translation
> @@ -543,6 +551,188 @@
> #define BCM2836_IRQ_SOURCE_PMU 0x00000200
> #define BCM2836_IRQ_SOURCE_LOCAL_TIMER 0x00000800
>
> +
> +
> +/**
> + * @name Raspberry Pi 4 ARM_LOCAL registers
> + *
> + * @{
> + */
> +
> +#define BCM2711_LOCAL_REGS_BASE 0x4C0000000
> +
> +#define BCM2711_LOCAL_ARM_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x00)
> +#define BCM2711_LOCAL_CORE_IRQ_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x0c)
> +#define BCM2711_LOCAL_PMU_CONTROL_SET (BCM2711_LOCAL_REGS_BASE + 0x10)
> +#define BCM2711_LOCAL_PMU_CONTROL_CLR (BCM2711_LOCAL_REGS_BASE + 0x14)
> +#define BCM2711_LOCAL_PERI_IRQ_ROUTE0 (BCM2711_LOCAL_REGS_BASE + 0x24)
> +#define BCM2711_LOCAL_AXI_QUIET_TIME (BCM2711_LOCAL_REGS_BASE + 0x30)
> +#define BCM2711_LOCAL_LOCAL_TIMER_CONTROL (BCM2711_LOCAL_REGS_BASE + 0x34)
> +#define BCM2711_LOCAL_LOCAL_TIMER_IRQ (BCM2711_LOCAL_REGS_BASE +
> 0x38)
> +
> +#define BCM2711_LOCAL_TIMER_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x40)
> +#define BCM2711_LOCAL_TIMER_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x44)
> +#define BCM2711_LOCAL_TIMER_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x48)
> +#define BCM2711_LOCAL_TIMER_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x4c)
> +
> +#define BCM2711_LOCAL_MAILBOX_CNTRL0 (BCM2711_LOCAL_REGS_BASE + 0x50)
> +#define BCM2711_LOCAL_MAILBOX_CNTRL1 (BCM2711_LOCAL_REGS_BASE + 0x54)
> +#define BCM2711_LOCAL_MAILBOX_CNTRL2 (BCM2711_LOCAL_REGS_BASE + 0x58)
> +#define BCM2711_LOCAL_MAILBOX_CNTRL3 (BCM2711_LOCAL_REGS_BASE + 0x5c)
> +
> +#define BCM2711_LOCAL_IRQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x60)
> +#define BCM2711_LOCAL_IRQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x64)
> +#define BCM2711_LOCAL_IRQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x68)
> +#define BCM2711_LOCAL_IRQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x6c)
> +
> +#define BCM2711_LOCAL_FIQ_SOURCE0 (BCM2711_LOCAL_REGS_BASE + 0x70)
> +#define BCM2711_LOCAL_FIQ_SOURCE1 (BCM2711_LOCAL_REGS_BASE + 0x74)
> +#define BCM2711_LOCAL_FIQ_SOURCE2 (BCM2711_LOCAL_REGS_BASE + 0x78)
> +#define BCM2711_LOCAL_FIQ_SOURCE3 (BCM2711_LOCAL_REGS_BASE + 0x7c)
> +
> +
> +/**
> + * @name Raspberry Pi 4 ARM_C FIQ and IRQ registers
> + *
> + * @{
> + */
> +
> +#define BCM2711_ARMC_REGS_BASE (RPI_PERIPHERAL_BASE + 0xB200)
> +
> +#define BCM2711_ARMC_IRQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x00)
> +#define BCM2711_ARMC_IRQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x04)
> +#define BCM2711_ARMC_IRQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x08)
> +#define BCM2711_ARMC_IRQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x10)
> +#define BCM2711_ARMC_IRQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x14)
> +#define BCM2711_ARMC_IRQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x18)
> +#define BCM2711_ARMC_IRQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x20)
> +#define BCM2711_ARMC_IRQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x24)
> +#define BCM2711_ARMC_IRQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x28)
> +
> +#define BCM2711_ARMC_IRQ_STATUS0 (BCM2711_ARMC_REGS_BASE + 0x30)
> +#define BCM2711_ARMC_IRQ_STATUS1 (BCM2711_ARMC_REGS_BASE + 0x34)
> +#define BCM2711_ARMC_IRQ_STATUS2 (BCM2711_ARMC_REGS_BASE + 0x38)
> +
> +#define BCM2711_ARMC_IRQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x40)
> +#define BCM2711_ARMC_IRQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x44)
> +#define BCM2711_ARMC_IRQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x48)
> +#define BCM2711_ARMC_IRQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x50)
> +#define BCM2711_ARMC_IRQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x54)
> +#define BCM2711_ARMC_IRQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x58)
> +#define BCM2711_ARMC_IRQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x60)
> +#define BCM2711_ARMC_IRQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x64)
> +#define BCM2711_ARMC_IRQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x68)
> +
> +#define BCM2711_ARMC_IRQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x80)
> +#define BCM2711_ARMC_IRQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x84)
> +#define BCM2711_ARMC_IRQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x88)
> +#define BCM2711_ARMC_IRQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x90)
> +#define BCM2711_ARMC_IRQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x94)
> +#define BCM2711_ARMC_IRQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x98)
> +#define BCM2711_ARMC_IRQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xA0)
> +#define BCM2711_ARMC_IRQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xA4)
> +#define BCM2711_ARMC_IRQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xA8)
> +
> +#define BCM2711_ARMC_IRQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0xC0)
> +#define BCM2711_ARMC_IRQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0xC4)
> +#define BCM2711_ARMC_IRQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0xC8)
> +#define BCM2711_ARMC_IRQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0xD0)
> +#define BCM2711_ARMC_IRQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0xD4)
> +#define BCM2711_ARMC_IRQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0xD8)
> +#define BCM2711_ARMC_IRQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0xE0)
> +#define BCM2711_ARMC_IRQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0xE4)
> +#define BCM2711_ARMC_IRQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0xE8)
> +
> +
> +
> +#define BCM2711_ARMC_FIQ0_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x100)
> +#define BCM2711_ARMC_FIQ0_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x104)
> +#define BCM2711_ARMC_FIQ0_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x108)
> +#define BCM2711_ARMC_FIQ0_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x110)
> +#define BCM2711_ARMC_FIQ0_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x114)
> +#define BCM2711_ARMC_FIQ0_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x118)
> +#define BCM2711_ARMC_FIQ0_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x120)
> +#define BCM2711_ARMC_FIQ0_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x124)
> +#define BCM2711_ARMC_FIQ0_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x128)
> +
> +#define BCM2711_ARMC_FIQ1_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x140)
> +#define BCM2711_ARMC_FIQ1_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x144)
> +#define BCM2711_ARMC_FIQ1_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x148)
> +#define BCM2711_ARMC_FIQ1_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x150)
> +#define BCM2711_ARMC_FIQ1_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x154)
> +#define BCM2711_ARMC_FIQ1_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x158)
> +#define BCM2711_ARMC_FIQ1_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x160)
> +#define BCM2711_ARMC_FIQ1_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x164)
> +#define BCM2711_ARMC_FIQ1_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x168)
> +
> +#define BCM2711_ARMC_FIQ2_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x180)
> +#define BCM2711_ARMC_FIQ2_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x184)
> +#define BCM2711_ARMC_FIQ2_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x188)
> +#define BCM2711_ARMC_FIQ2_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x190)
> +#define BCM2711_ARMC_FIQ2_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x194)
> +#define BCM2711_ARMC_FIQ2_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x198)
> +#define BCM2711_ARMC_FIQ2_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1A0)
> +#define BCM2711_ARMC_FIQ2_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1A4)
> +#define BCM2711_ARMC_FIQ2_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1A8)
> +
> +#define BCM2711_ARMC_FIQ3_PENDING0 (BCM2711_ARMC_REGS_BASE + 0x1C0)
> +#define BCM2711_ARMC_FIQ3_PENDING1 (BCM2711_ARMC_REGS_BASE + 0x1C4)
> +#define BCM2711_ARMC_FIQ3_PENDING2 (BCM2711_ARMC_REGS_BASE + 0x1C8)
> +#define BCM2711_ARMC_FIQ3_SET_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1D0)
> +#define BCM2711_ARMC_FIQ3_SET_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1D4)
> +#define BCM2711_ARMC_FIQ3_SET_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1D8)
> +#define BCM2711_ARMC_FIQ3_CLR_EN_0 (BCM2711_ARMC_REGS_BASE + 0x1E0)
> +#define BCM2711_ARMC_FIQ3_CLR_EN_1 (BCM2711_ARMC_REGS_BASE + 0x1E4)
> +#define BCM2711_ARMC_FIQ3_CLR_EN_2 (BCM2711_ARMC_REGS_BASE + 0x1E8)
> +
> +#define BCM2711_ARMC_SWIRQ_SET (BCM2711_ARMC_REGS_BASE + 0x1F0)
> +#define BCM2711_ARMC_SWIRQ_CLEAR (BCM2711_ARMC_REGS_BASE + 0x1F4)
> +
> +
> +/**
> + * @name Raspberry Pi 4 Mailbox registers
> + *
> + * @{
> + */
> +
> +
> +
> +#define BCM2711_MAILBOX_00_WRITE_SET_BASE 0x4C000080
> +#define BCM2711_MAILBOX_01_WRITE_SET_BASE 0x4C000084
> +#define BCM2711_MAILBOX_02_WRITE_SET_BASE 0x4C000088
> +#define BCM2711_MAILBOX_03_WRITE_SET_BASE 0x4C00008C
> +#define BCM2711_MAILBOX_04_WRITE_SET_BASE 0x4C000090
> +#define BCM2711_MAILBOX_05_WRITE_SET_BASE 0x4C000094
> +#define BCM2711_MAILBOX_06_WRITE_SET_BASE 0x4C000098
> +#define BCM2711_MAILBOX_07_WRITE_SET_BASE 0x4C00009C
> +#define BCM2711_MAILBOX_08_WRITE_SET_BASE 0x4C0000A0
> +#define BCM2711_MAILBOX_09_WRITE_SET_BASE 0x4C0000A4
> +#define BCM2711_MAILBOX_10_WRITE_SET_BASE 0x4C0000A8
> +#define BCM2711_MAILBOX_11_WRITE_SET_BASE 0x4C0000AC
> +#define BCM2711_MAILBOX_12_WRITE_SET_BASE 0x4C0000B0
> +#define BCM2711_MAILBOX_13_WRITE_SET_BASE 0x4C0000B4
> +#define BCM2711_MAILBOX_14_WRITE_SET_BASE 0x4C0000B8
> +#define BCM2711_MAILBOX_15_WRITE_SET_BASE 0x4C0000BC
> +
> +#define BCM2711_MAILBOX_00_READ_CLEAR_BASE 0x4C0000C0
> +#define BCM2711_MAILBOX_01_READ_CLEAR_BASE 0x4C0000C4
> +#define BCM2711_MAILBOX_02_READ_CLEAR_BASE 0x4C0000C8
> +#define BCM2711_MAILBOX_03_READ_CLEAR_BASE 0x4C0000CC
> +#define BCM2711_MAILBOX_04_READ_CLEAR_BASE 0x4C0000D0
> +#define BCM2711_MAILBOX_05_READ_CLEAR_BASE 0x4C0000D4
> +#define BCM2711_MAILBOX_06_READ_CLEAR_BASE 0x4C0000D8
> +#define BCM2711_MAILBOX_07_READ_CLEAR_BASE 0x4C0000DC
> +#define BCM2711_MAILBOX_08_READ_CLEAR_BASE 0x4C0000E0
> +#define BCM2711_MAILBOX_09_READ_CLEAR_BASE 0x4C0000E4
> +#define BCM2711_MAILBOX_10_READ_CLEAR_BASE 0x4C0000E8
> +#define BCM2711_MAILBOX_11_READ_CLEAR_BASE 0x4C0000EC
> +#define BCM2711_MAILBOX_12_READ_CLEAR_BASE 0x4C0000F0
> +#define BCM2711_MAILBOX_13_READ_CLEAR_BASE 0x4C0000F4
> +#define BCM2711_MAILBOX_14_READ_CLEAR_BASE 0x4C0000F8
> +#define BCM2711_MAILBOX_15_READ_CLEAR_BASE 0x4C0000FC
> +
> +
> +
> /** @} */
>
> #endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */
>
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