[PATCH 13/13] bsps: Add gicv3_get_attributes()
Sebastian Huber
sebastian.huber at embedded-brains.de
Fri Mar 18 07:19:15 UTC 2022
---
bsps/include/dev/irq/arm-gicv3.h | 32 ++++++++++++++++++++++++++++++++
bsps/shared/dev/irq/arm-gicv3.c | 27 +--------------------------
2 files changed, 33 insertions(+), 26 deletions(-)
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h
index 6a716894b4..0d3ef9a1c1 100644
--- a/bsps/include/dev/irq/arm-gicv3.h
+++ b/bsps/include/dev/irq/arm-gicv3.h
@@ -327,6 +327,38 @@ static void gicv3_init_cpu_interface(uint32_t cpu_index)
WRITE_SR(ICC_CTLR, 0x0);
}
+static inline void gicv3_get_attributes(
+ rtems_vector_number vector,
+ rtems_interrupt_attributes *attributes
+)
+{
+ attributes->is_maskable = true;
+ attributes->maybe_enable = true;
+ attributes->maybe_disable = true;
+ attributes->can_raise = true;
+
+ if ( vector <= ARM_GIC_IRQ_SGI_LAST ) {
+ /*
+ * It is implementation-defined whether implemented SGIs are permanently
+ * enabled, or can be enabled and disabled by writes to GICD_ISENABLER0 and
+ * GICD_ICENABLER0.
+ */
+ attributes->can_raise_on = true;
+ attributes->cleared_by_acknowledge = true;
+ attributes->trigger_signal = RTEMS_INTERRUPT_NO_SIGNAL;
+ } else {
+ attributes->can_disable = true;
+ attributes->can_clear = true;
+ attributes->trigger_signal = RTEMS_INTERRUPT_UNSPECIFIED_SIGNAL;
+
+ if ( vector > ARM_GIC_IRQ_PPI_LAST ) {
+ /* SPI */
+ attributes->can_get_affinity = true;
+ attributes->can_set_affinity = true;
+ }
+ }
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index d81f3b50c1..4772ff5db4 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -49,32 +49,7 @@ rtems_status_code bsp_interrupt_get_attributes(
rtems_interrupt_attributes *attributes
)
{
- attributes->is_maskable = true;
- attributes->maybe_enable = true;
- attributes->maybe_disable = true;
- attributes->can_raise = true;
-
- if ( vector <= ARM_GIC_IRQ_SGI_LAST ) {
- /*
- * It is implementation-defined whether implemented SGIs are permanently
- * enabled, or can be enabled and disabled by writes to GICD_ISENABLER0 and
- * GICD_ICENABLER0.
- */
- attributes->can_raise_on = true;
- attributes->cleared_by_acknowledge = true;
- attributes->trigger_signal = RTEMS_INTERRUPT_NO_SIGNAL;
- } else {
- attributes->can_disable = true;
- attributes->can_clear = true;
- attributes->trigger_signal = RTEMS_INTERRUPT_UNSPECIFIED_SIGNAL;
-
- if ( vector > ARM_GIC_IRQ_PPI_LAST ) {
- /* SPI */
- attributes->can_get_affinity = true;
- attributes->can_set_affinity = true;
- }
- }
-
+ gicv3_get_attributes(vector, attributes);
return RTEMS_SUCCESSFUL;
}
--
2.34.1
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