Visibility of RISCV_BOOT_HARTID

[Joel Sherrill]

On Thu, Oct 13, 2022 at 2:18 AM <Padmarao.Begari at microchip.com> wrote:

>
> > On Thu, 2022-10-13 at 06:27 +0200, Sebastian Huber wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you
> > know the content is safe
> >
> > On 12/10/2022 16:36, Joel Sherrill wrote:
> > > Hi
> > >
> > > I was looking at the bsp default settings for sparc/leon3 to show
> > > someone and noticed this which is out of place.
> > >
> > > # boot hartid (processor number) of risc-v cpu (default 0)
> > > RISCV_BOOT_HARTID = 0
> > >
> > > I looked around and see it is an architecture specific ini setting
> > > but
> > > placed in a directory with architecture independent settings. We
> > > don't
> > > appear to have any other examples of a cpukit option that is
> > > architecture specific. So it is lumped in with all the architecture
> > > independent ini settings.
> >
> > This was easy to fix:
> >
> >
> https://git.rtems.org/rtems/commit/?id=97fce5120c08180a86301b03e61d0a06db5f8b9b
> >
> Oh... I didn't see it and tried different way.
> > > We had long discussions about presenting these options with better
> > > names, documentation, etc as part of the waf transition. Seems
> > > unfortunate to have this show up in all configurations.
> > >
> > > Any thoughts on how to clean this up?
> >
> > It would be nice if more developers could invest some time to learn
> > how
> > the build system works.
>
> Yes.. need to learn more about the build system.
>

Agreed. I came across this while teaching an RTEMS class and
admit I didn't even begin to think about a solution. When I spot
something while teaching, if it is more than a spelling or grammar
error, I make a note of it. I usually just report it during the class week.

Thanks to both of you for responding and Sebastian for fixing it.

--joel


>
> Regards
> Padmarao
> >
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