[PATCH 3/3] Force ISR enable before scheduler start

[Kevin Eyssartier]

The ISR was not activated when running without RTEMS_SMP.
---
 cpukit/score/cpu/riscv/include/rtems/score/cpu.h | 3 +++
 cpukit/score/cpu/riscv/riscv-context-switch.S    | 5 +++++
 cpukit/score/src/threadstartmultitasking.c       | 2 +-
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
index f74ce99684..626b94db1d 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
@@ -222,6 +222,9 @@ void _CPU_Context_Initialize(
   void            *tls_area
 );
 
+#define _CPU_Context_Start_self( _the_context ) \
+   _CPU_Context_start( (_the_context) )
+
 #define _CPU_Context_Restart_self( _the_context ) \
    _CPU_Context_restore( (_the_context) )
 
diff --git a/cpukit/score/cpu/riscv/riscv-context-switch.S b/cpukit/score/cpu/riscv/riscv-context-switch.S
index cfaff444b0..3428fdd076 100644
--- a/cpukit/score/cpu/riscv/riscv-context-switch.S
+++ b/cpukit/score/cpu/riscv/riscv-context-switch.S
@@ -40,6 +40,7 @@
 PUBLIC(_CPU_Context_switch)
 PUBLIC(_CPU_Context_switch_no_return)
 PUBLIC(_CPU_Context_restore)
+PUBLIC(_CPU_Context_start)
 #ifdef RTEMS_SMP
 PUBLIC(_RISCV_Start_multitasking)
 #endif
@@ -146,6 +147,10 @@ SYM(_CPU_Context_switch_no_return):
 
 	ret
 
+SYM(_CPU_Context_start):
+	/* Enable interrupts */
+	csrrs	zero, mstatus, RISCV_MSTATUS_MIE
+
 SYM(_CPU_Context_restore):
 	mv	a1, a0
 	GET_SELF_CPU_CONTROL	a2
diff --git a/cpukit/score/src/threadstartmultitasking.c b/cpukit/score/src/threadstartmultitasking.c
index d97d2e0c82..b9e55fbd69 100644
--- a/cpukit/score/src/threadstartmultitasking.c
+++ b/cpukit/score/src/threadstartmultitasking.c
@@ -81,6 +81,6 @@ void _Thread_Start_multitasking( void )
     RTEMS_UNREACHABLE();
   }
 #else
-  _CPU_Context_Restart_self( &heir->Registers );
+  _CPU_Context_Start_self( &heir->Registers );
 #endif
 }
-- 
2.25.1