[PATCH] cpukit/riscv : RISCV multitasking with non SMP

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Aug 9 13:28:54 UTC 2023


Hello Kevin,

the patch itself is all right, except some formatting issues. However, I 
still don't understand why it is necessary. I did run the test suite on 
a non-SMP system and it worked well. Interrupts should be enabled in

void _Thread_Handler( void )
{
   Thread_Control  *executing;
   ISR_Level        level;
   Per_CPU_Control *cpu_self;

   /*
    * Some CPUs need to tinker with the call frame or registers when the
    * thread actually begins to execute for the first time.  This is a
    * hook point where the port gets a shot at doing whatever it requires.
    */
   _Context_Initialization_at_thread_begin();
   executing = _Thread_Executing;

   /*
    * have to put level into a register for those cpu's that use
    * inline asm here
    */
   level = executing->Start.isr_level;
   _ISR_Set_level( level );

here through the _ISR_Set_level().

The level shall be zero. If it is non-zero, then this is an application 
bug resulting in the INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT 
fatal error. This error happens also if you call operating system 
services which block with interrupts disabled.

Do you have a self-contained test case for the RTEMS test suite which 
shows the problem you want to solve?

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