[PATCH] bsp/clock_isr: merge the FAST_IDLE clock and normal clock driver

Zhu Zhongjie zhongjiezhu1 at gmail.com
Thu Jan 12 01:21:51 UTC 2023


From: Zhongjie Zhu <zhongjiezhu1 at gmail.com>

---
 bsps/shared/dev/clock/clockimpl.h | 105 +++++++++++++++---------------
 1 file changed, 51 insertions(+), 54 deletions(-)

diff --git a/bsps/shared/dev/clock/clockimpl.h b/bsps/shared/dev/clock/clockimpl.h
index ccf6d3ab60..0a7f382070 100644
--- a/bsps/shared/dev/clock/clockimpl.h
+++ b/bsps/shared/dev/clock/clockimpl.h
@@ -160,64 +160,61 @@ rtems_isr Clock_isr(
    */
   Clock_driver_ticks += 1;
 
+  /*
+   *  Do the hardware specific per-tick action.
+   *
+   *  The counter/timer may or may not be set to automatically reload.
+   */
+  Clock_driver_support_at_tick();
+
+#if CLOCK_DRIVER_ISRS_PER_TICK
+  /*
+   *  The driver is multiple ISRs per clock tick.
+   */
+  if ( !Clock_driver_isrs ) {
+    Clock_driver_timecounter_tick();
+
+    Clock_driver_isrs = CLOCK_DRIVER_ISRS_PER_TICK_VALUE;
+  }
+  Clock_driver_isrs--;
+#else
+  /*
+   *  The driver is one ISR per clock tick.
+   */
+
   #if CLOCK_DRIVER_USE_FAST_IDLE
-    {
-      Clock_driver_timecounter_tick();
-
-      if (_SMP_Get_processor_maximum() == 1) {
-        struct timecounter *tc;
-        uint64_t            us_per_tick;
-        uint32_t            interval;
-        Per_CPU_Control    *cpu_self;
-
-        cpu_self = _Per_CPU_Get();
-        tc = _Timecounter;
-        us_per_tick = rtems_configuration_get_microseconds_per_tick();
-        interval = (uint32_t) ((tc->tc_frequency * us_per_tick) / 1000000);
-
-        while (
-          cpu_self->thread_dispatch_disable_level == cpu_self->isr_nest_level
-            && cpu_self->heir == cpu_self->executing
-            && cpu_self->executing->is_idle
-        ) {
-          ISR_lock_Context lock_context;
-
-          _Timecounter_Acquire(&lock_context);
-          _Timecounter_Tick_simple(
-            interval,
-            (*tc->tc_get_timecount)(tc),
-            &lock_context
-          );
-        }
+  {
+    if (_SMP_Get_processor_maximum() == 1) {
+      struct timecounter *tc;
+      uint64_t            us_per_tick;
+      uint32_t            interval;
+      Per_CPU_Control    *cpu_self;
+
+      cpu_self = _Per_CPU_Get();
+      tc = _Timecounter;
+      us_per_tick = rtems_configuration_get_microseconds_per_tick();
+      interval = (uint32_t) ((tc->tc_frequency * us_per_tick) / 1000000);
+
+      while (
+        cpu_self->thread_dispatch_disable_level == cpu_self->isr_nest_level
+          && cpu_self->heir == cpu_self->executing
+          && cpu_self->executing->is_idle
+      ) {
+        ISR_lock_Context lock_context;
+
+        _Timecounter_Acquire(&lock_context);
+        _Timecounter_Tick_simple(
+          interval,
+          (*tc->tc_get_timecount)(tc),
+          &lock_context
+        );
       }
-
-      Clock_driver_support_at_tick();
     }
-  #else
-    /*
-     *  Do the hardware specific per-tick action.
-     *
-     *  The counter/timer may or may not be set to automatically reload.
-     */
-    Clock_driver_support_at_tick();
-
-    #if CLOCK_DRIVER_ISRS_PER_TICK
-      /*
-       *  The driver is multiple ISRs per clock tick.
-       */
-      if ( !Clock_driver_isrs ) {
-        Clock_driver_timecounter_tick();
-
-        Clock_driver_isrs = CLOCK_DRIVER_ISRS_PER_TICK_VALUE;
-      }
-      Clock_driver_isrs--;
-    #else
-      /*
-       *  The driver is one ISR per clock tick.
-       */
-      Clock_driver_timecounter_tick();
-    #endif
+  }
   #endif
+
+  Clock_driver_timecounter_tick();
+#endif
 }
 
 void _Clock_Initialize( void )
-- 
2.34.1



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