[PATCH] score/arm: style fixes

[Gedare Bloom]

On Tue, Jul 25, 2023 at 5:03 PM Joel Sherrill <joel at rtems.org> wrote:
>
>
>
> On Tue, Jul 25, 2023 at 5:53 PM Gedare Bloom <gedare at rtems.org> wrote:
>>
>> On Tue, Jul 25, 2023 at 4:48 PM Joel Sherrill <joel at rtems.org> wrote:
>> >
>> > I may have missed something. Commented in one place.
>> >
>> > It looks like mostly spaces inside () and variable/parameter declaration changes.
>> >
>> Yes, for the most part those are the least consistent so far.
>>
>> > On Tue, Jul 25, 2023 at 4:38 PM Gedare Bloom <gedare at rtems.org> wrote:
>> >> diff --git a/cpukit/score/cpu/arm/armv7m-isr-dispatch.c b/cpukit/score/cpu/arm/armv7m-isr-dispatch.c
>> >> index ea168969ba..dfc125d545 100644
>> >> --- a/cpukit/score/cpu/arm/armv7m-isr-dispatch.c
>> >> +++ b/cpukit/score/cpu/arm/armv7m-isr-dispatch.c
>> >> @@ -43,7 +43,7 @@
>> >>
>> >>  #ifdef ARM_MULTILIB_ARCH_V7M
>> >>
>> >> -static void __attribute__((naked)) _ARMV7M_Thread_dispatch( void )
>> >> +static void __attribute__((naked)) _ARMV7M_Thread_dispatch(void)
>> >>  {
>> >>    __asm__ volatile (
>> >>      "bl _Thread_Dispatch\n"
>> >> @@ -53,7 +53,7 @@ static void __attribute__((naked)) _ARMV7M_Thread_dispatch( void )
>> >>    );
>> >>  }
>> >>
>> >> -static void _ARMV7M_Trigger_lazy_floating_point_context_save( void )
>> >> +static void _ARMV7M_Trigger_lazy_floating_point_context_save(void)
>> >>  {
>> >>  #ifdef ARM_MULTILIB_VFP
>> >>    __asm__ volatile (
>> >> @@ -62,7 +62,7 @@ static void _ARMV7M_Trigger_lazy_floating_point_context_save( void )
>> >>  #endif
>> >>  }
>> >>
>> >> -void _ARMV7M_Pendable_service_call( void )
>> >> +void _ARMV7M_Pendable_service_call(void)
>> >>  {
>> >>    Per_CPU_Control *cpu_self = _Per_CPU_Get();
>> >>
>> >> @@ -73,7 +73,7 @@ void _ARMV7M_Pendable_service_call( void )
>> >>     * this interrupt service may be delayed until interrupts are enable again.
>> >>     */
>> >>    if (
>> >> -    ( cpu_self->isr_nest_level | cpu_self->thread_dispatch_disable_level ) == 0
>> >> +    (cpu_self->isr_nest_level | cpu_self->thread_dispatch_disable_level) == 0
>> >>    ) {
>> >
>> >
>> > Does this fit on a single line?
>> >
>> No. it's like two characters short. In fact, i had to do this one
>> manually. otherwise, it breaks as
>> if ( (...
>>     ) == 0 ) {
>
>
> ! instead of == 0? :)

I'm not sure I want to nitpick on code changes during this pass. Feel
free to send a patch for code changes though ;)

>>
>>
>> > Ignoring the fact it is using bitwise operations on two integer counters. Perhaps
>> > it should be a +?
>> >
>> separate problem I suppose. That is a little bit of a suspicious bit of logic.