[PATCH v2 03/32] bsps/grlib: Fix GRGPIO - IRQMAP bit fields

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Jun 16 06:01:00 UTC 2023


Update #4842.
---
 bsps/include/grlib/grgpio-regs.h | 37 +++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 13 deletions(-)

diff --git a/bsps/include/grlib/grgpio-regs.h b/bsps/include/grlib/grgpio-regs.h
index b1768ff92e..8c3c7ffb16 100644
--- a/bsps/include/grlib/grgpio-regs.h
+++ b/bsps/include/grlib/grgpio-regs.h
@@ -285,18 +285,18 @@ extern "C" {
  * @{
  */
 
-#define GRGPIO_IRQMAPR_IRQMAP_I_SHIFT 24
-#define GRGPIO_IRQMAPR_IRQMAP_I_MASK 0x7f000000U
-#define GRGPIO_IRQMAPR_IRQMAP_I_GET( _reg ) \
-  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_MASK ) >> \
-    GRGPIO_IRQMAPR_IRQMAP_I_SHIFT )
-#define GRGPIO_IRQMAPR_IRQMAP_I_SET( _reg, _val ) \
-  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_MASK ) | \
-    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_SHIFT ) & \
-      GRGPIO_IRQMAPR_IRQMAP_I_MASK ) )
-#define GRGPIO_IRQMAPR_IRQMAP_I( _val ) \
-  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_SHIFT ) & \
-    GRGPIO_IRQMAPR_IRQMAP_I_MASK )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT 24
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_MASK 0x1f000000U
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_GET( _reg ) \
+  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) >> \
+    GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) | \
+    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
+      GRGPIO_IRQMAPR_IRQMAP_I_0_MASK ) )
+#define GRGPIO_IRQMAPR_IRQMAP_I_0( _val ) \
+  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_0_SHIFT ) & \
+    GRGPIO_IRQMAPR_IRQMAP_I_0_MASK )
 
 #define GRGPIO_IRQMAPR_IRQMAP_I_1_SHIFT 16
 #define GRGPIO_IRQMAPR_IRQMAP_I_1_MASK 0x1f0000U
@@ -324,7 +324,18 @@ extern "C" {
   ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_2_SHIFT ) & \
     GRGPIO_IRQMAPR_IRQMAP_I_2_MASK )
 
-#define GRGPIO_IRQMAPR_IRQMAP_I_3 0x10U
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT 0
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_MASK 0x1fU
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_GET( _reg ) \
+  ( ( ( _reg ) & GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) >> \
+    GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT )
+#define GRGPIO_IRQMAPR_IRQMAP_I_3_SET( _reg, _val ) \
+  ( ( ( _reg ) & ~GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) | \
+    ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
+      GRGPIO_IRQMAPR_IRQMAP_I_3_MASK ) )
+#define GRGPIO_IRQMAPR_IRQMAP_I_3( _val ) \
+  ( ( ( _val ) << GRGPIO_IRQMAPR_IRQMAP_I_3_SHIFT ) & \
+    GRGPIO_IRQMAPR_IRQMAP_I_3_MASK )
 
 /** @} */
 
-- 
2.35.3



More information about the devel mailing list