[PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
Alex White
alex.white at oarcorp.com
Wed Mar 29 19:22:58 UTC 2023
From: "Maldonado, Sergio E. (GSFC-580.0)" <sergio.e.maldonado at nasa.gov>
---
bsps/microblaze/include/dev/serial/uartlite.h | 2 +
.../microblaze_fpga/console/console-io.c | 229 ++++++++++++++++--
bsps/microblaze/shared/dev/serial/uartlite.c | 8 +-
.../bsps/microblaze/microblaze_fpga/grp.yml | 32 +++
.../bsps/microblaze/microblaze_fpga/obj.yml | 1 -
.../microblaze_fpga/optconsoleuart.yml | 21 ++
.../microblaze_fpga/optuart1irq.yml | 20 ++
.../optuart1litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart2irq.yml | 20 ++
.../optuart2litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart3irq.yml | 20 ++
.../optuart3litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart4irq.yml | 20 ++
.../optuart4litebaseaddress.yml | 20 ++
.../microblaze/microblaze_fpga/optuartirq.yml | 20 ++
.../microblaze/microblaze_fpga/optuseuart.yml | 17 ++
.../microblaze_fpga/optuseuart1.yml | 17 ++
.../microblaze_fpga/optuseuart2.yml | 17 ++
.../microblaze_fpga/optuseuart3.yml | 17 ++
.../microblaze_fpga/optuseuart4.yml | 17 ++
20 files changed, 534 insertions(+), 24 deletions(-)
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optconsoleuart.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart1irq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart1litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart2irq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart2litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart3irq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart3litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart4irq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart4litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuartirq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart1.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart2.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart3.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart4.yml
diff --git a/bsps/microblaze/include/dev/serial/uartlite.h b/bsps/microblaze/include/dev/serial/uartlite.h
index 2fda3796b3..009f416508 100644
--- a/bsps/microblaze/include/dev/serial/uartlite.h
+++ b/bsps/microblaze/include/dev/serial/uartlite.h
@@ -49,8 +49,10 @@ typedef struct {
rtems_termios_device_context base;
uintptr_t address;
uint32_t initial_baud;
+ uint32_t enabled;
#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
bool transmitting;
+ uint32_t irq;
#endif
} uart_lite_context;
diff --git a/bsps/microblaze/microblaze_fpga/console/console-io.c b/bsps/microblaze/microblaze_fpga/console/console-io.c
index 81c4e73690..72c3a0c989 100644
--- a/bsps/microblaze/microblaze_fpga/console/console-io.c
+++ b/bsps/microblaze/microblaze_fpga/console/console-io.c
@@ -34,38 +34,235 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include <unistd.h>
+#include <string.h>
+
+#include <sys/param.h>
#include <bsp/console-termios.h>
-#include <bsp/microblaze-fdt-support.h>
+#include <bsp/fatal.h>
+#include <bspopts.h>
#include <dev/serial/uartlite.h>
-#include <bspopts.h>
+#ifdef BSP_MICROBLAZE_FPGA_USE_FDT
+#include <bsp/fdt.h>
+#include <libfdt.h>
+#endif
-uart_lite_context microblaze_qemu_uart_context = {
- .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE" ),
- .initial_baud = 115200
+#include <rtems/console.h>
+
+static uart_lite_context uart_lite_instances[] = {
+ {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE" ),
+ .initial_baud = 115200,
+ .address = BSP_MICROBLAZE_FPGA_UART_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART
+ .enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ .irq = BSP_MICROBLAZE_FPGA_UART_IRQ
+#endif
+ },
+ {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART1" ),
+ .initial_baud = 115200,
+ .address = BSP_MICROBLAZE_FPGA_UART1_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART1
+ .enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ .irq = BSP_MICROBLAZE_FPGA_UART1_IRQ
+#endif
+ },
+ {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART2" ),
+ .initial_baud = 115200,
+ .address = BSP_MICROBLAZE_FPGA_UART2_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART2
+ .enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ .irq = BSP_MICROBLAZE_FPGA_UART2_IRQ
+#endif
+ },
+ {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART3" ),
+ .initial_baud = 115200,
+ .address = BSP_MICROBLAZE_FPGA_UART3_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART3
+ .enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ .irq = BSP_MICROBLAZE_FPGA_UART3_IRQ
+#endif
+ },
+ {
+ .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART4" ),
+ .initial_baud = 115200,
+ .address = BSP_MICROBLAZE_FPGA_UART4_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART4
+ .enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ .irq = BSP_MICROBLAZE_FPGA_UART4_IRQ
+#endif
+ }
};
-static bool fill_uart_base(rtems_termios_device_context *context)
+#ifdef BSP_MICROBLAZE_FPGA_USE_FDT
+static int microblaze_fpga_get_stdout_node(const void *fdt)
{
- uint32_t mblaze_uart_base;
+ int node;
+ int len;
+ int offset;
+ const char *console;
+ const char *q;
- mblaze_uart_base = try_get_prop_from_device_tree(
- "xlnx,xps-uartlite-1.00.a",
- "reg",
- BSP_MICROBLAZE_FPGA_UART_BASE
- );
+ node = fdt_path_offset( fdt, "/chosen" );
+ if ( node < 0 ) {
+ return 0;
+ }
- microblaze_qemu_uart_context.address = mblaze_uart_base;
+ console = fdt_getprop( fdt, node, "stdout-path", NULL );
+ if ( console == NULL ) {
+ return 0;
+ }
- return true;
+ q = strchr(console, ':');
+ if ( !q ) {
+ return 0;
+ }
+
+ len = q - console;
+
+ /* Get the node specified by stdout-path */
+ offset = fdt_path_offset_namelen( fdt, console, len );
+ if (offset < 0) {
+ return 0;
+ }
+
+ return offset;
+}
+#endif
+
+rtems_device_driver console_initialize(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *arg
+)
+{
+ uint32_t port;
+ uint32_t stdout_port = BSP_MICROBLAZE_FPGA_CONSOLE_UART;
+
+#ifdef BSP_MICROBLAZE_FPGA_USE_FDT
+ const char compatible[] = "xlnx,xps-uartlite-1.00.a";
+ const void *fdt = bsp_fdt_get();
+ int len;
+ int stdout_node = microblaze_fpga_get_stdout_node(fdt);
+ int node = fdt_node_offset_by_compatible( fdt, -1, compatible);
+
+ while ( node != -FDT_ERR_NOTFOUND ) {
+ const uint32_t *prop;
+ const void *status;
+ uint32_t disabled = 0;
+ port = console_device_count;
+
+ /* check if node device status has been set to disabled */
+ status = fdt_getprop( fdt, node, "status", &len );
+ if ( status != NULL ) {
+ if ( strncmp( status, "disabled", MIN( 9, len) ) == 0 ) {
+ disabled = 1;
+ }
+ }
+
+ if ( !disabled ) {
+ /* use port number property as the device table index */
+ prop = fdt_getprop( fdt, node, "port-number", NULL );
+ if ( prop != NULL ) {
+ port = fdt32_to_cpu( prop[0] );
+ }
+
+ if ( port < console_device_count ) {
+ prop = fdt_getprop( fdt, node, "reg", NULL );
+ if ( prop != NULL ) {
+ uint32_t address = fdt32_to_cpu( prop[0] );
+ uart_lite_instances[ port ].address = address;
+ uart_lite_instances[ port ].enabled = 1;
+ if ( node == stdout_node ) {
+ stdout_port = port;
+ }
+ }
+
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+ prop = fdt_getprop( fdt, node, "interrupts", NULL );
+ if ( prop != NULL ) {
+ uint32_t irq = fdt32_to_cpu( prop[0] );
+ uart_lite_instances[ port ].irq = irq;
+ }
+#endif
+ }
+ }
+
+ node = fdt_node_offset_by_compatible( fdt, node, compatible );
+
+ if ( disabled || ( port >= console_device_count ) )
+ continue;
+ }
+#endif /* BSP_MICROBLAZE_FPGA_USE_FDT */
+
+ rtems_termios_initialize();
+
+ for ( port = 0; port < console_device_count; port++ ) {
+ const console_device *ctx = &console_device_table[ port ];
+ rtems_status_code sc;
+
+ if ( !uart_lite_instances[ port ].enabled )
+ continue;
+
+ sc = rtems_termios_device_install(
+ ctx->device_file,
+ ctx->handler,
+ ctx->flow,
+ ctx->context
+ );
+ if ( sc != RTEMS_SUCCESSFUL ) {
+ bsp_fatal( BSP_FATAL_CONSOLE_INSTALL_0 );
+ }
+
+ if ( port == stdout_port ) {
+ if ( link( ctx->device_file, CONSOLE_DEVICE_NAME ) != 0 ) {
+ bsp_fatal( BSP_FATAL_CONSOLE_INSTALL_1 );
+ }
+ }
+ }
+
+ return RTEMS_SUCCESSFUL;
}
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
- .probe = fill_uart_base,
.handler = µblaze_uart_fns,
- .context = µblaze_qemu_uart_context.base
+ .context = &uart_lite_instances[0].base
+ },
+ {
+ .device_file = "/dev/ttyS1",
+ .handler = µblaze_uart_fns,
+ .context = &uart_lite_instances[1].base
+ },
+ {
+ .device_file = "/dev/ttyS2",
+ .handler = µblaze_uart_fns,
+ .context = &uart_lite_instances[2].base
+ },
+ {
+ .device_file = "/dev/ttyS3",
+ .handler = µblaze_uart_fns,
+ .context = &uart_lite_instances[3].base
+ },
+ {
+ .device_file = "/dev/ttyS4",
+ .handler = µblaze_uart_fns,
+ .context = &uart_lite_instances[4].base
}
};
diff --git a/bsps/microblaze/shared/dev/serial/uartlite.c b/bsps/microblaze/shared/dev/serial/uartlite.c
index 953c630759..e2007ee24a 100644
--- a/bsps/microblaze/shared/dev/serial/uartlite.c
+++ b/bsps/microblaze/shared/dev/serial/uartlite.c
@@ -71,14 +71,8 @@ static bool uart_first_open(
#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
XUartLite_EnableIntr( ctx->address );
- uint32_t uart_irq_num = try_get_prop_from_device_tree(
- "xlnx,xps-uartlite-1.00.a",
- "interrupts",
- 1
- );
-
sc = rtems_interrupt_handler_install(
- uart_irq_num,
+ ctx->irq,
"UART",
RTEMS_INTERRUPT_SHARED,
microblaze_uart_interrupt,
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/grp.yml b/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
index aa88821458..11fb80e91f 100644
--- a/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
+++ b/spec/build/bsps/microblaze/microblaze_fpga/grp.yml
@@ -66,6 +66,38 @@ links:
uid: opttimerfrequency
- role: build-dependency
uid: optuartlitebaseaddress
+- role: build-dependency
+ uid: optuart1litebaseaddress
+- role: build-dependency
+ uid: optuart2litebaseaddress
+- role: build-dependency
+ uid: optuart3litebaseaddress
+- role: build-dependency
+ uid: optuart4litebaseaddress
+- role: build-dependency
+ uid: optuseuart
+- role: build-dependency
+ uid: optuseuart1
+- role: build-dependency
+ uid: optuseuart2
+- role: build-dependency
+ uid: optuseuart3
+- role: build-dependency
+ uid: optuseuart4
+- role: build-dependency
+ uid: optuartirq
+- role: build-dependency
+ uid: optuartirq
+- role: build-dependency
+ uid: optuart1irq
+- role: build-dependency
+ uid: optuart2irq
+- role: build-dependency
+ uid: optuart3irq
+- role: build-dependency
+ uid: optuart4irq
+- role: build-dependency
+ uid: optconsoleuart
- role: build-dependency
uid: optusefdt
- role: build-dependency
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/obj.yml b/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
index 67afbb7c7e..52ba596768 100644
--- a/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
+++ b/spec/build/bsps/microblaze/microblaze_fpga/obj.yml
@@ -47,7 +47,6 @@ source:
- bsps/shared/dev/cpucounter/cpucounterfrequency.c
- bsps/shared/dev/cpucounter/cpucounterread.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
-- bsps/shared/dev/serial/console-termios-init.c
- bsps/shared/dev/serial/console-termios.c
- bsps/shared/irq/irq-default-handler.c
- bsps/shared/start/bspfatal-default.c
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optconsoleuart.yml b/spec/build/bsps/microblaze/microblaze_fpga/optconsoleuart.yml
new file mode 100644
index 0000000000..8cc8e18062
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optconsoleuart.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 0
+default-by-variant: []
+description: |
+ default uart console device port number
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_MICROBLAZE_FPGA_CONSOLE_UART
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart1irq.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart1irq.yml
new file mode 100644
index 0000000000..4912d72b70
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart1irq.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 4
+default-by-variant: []
+description: |
+ irq number of the AXI UART1 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART1_IRQ
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart1litebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart1litebaseaddress.yml
new file mode 100644
index 0000000000..cd7afd6e91
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart1litebaseaddress.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 0x40610000
+default-by-variant: []
+description: |
+ base address of the AXI UART1 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART1_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart2irq.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart2irq.yml
new file mode 100644
index 0000000000..2cb961531c
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart2irq.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 5
+default-by-variant: []
+description: |
+ irq number of the AXI UART2 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART2_IRQ
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart2litebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart2litebaseaddress.yml
new file mode 100644
index 0000000000..0321e1b4d9
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart2litebaseaddress.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 0x40620000
+default-by-variant: []
+description: |
+ base address of the AXI UART2 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART2_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart3irq.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart3irq.yml
new file mode 100644
index 0000000000..d0c50be41d
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart3irq.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 6
+default-by-variant: []
+description: |
+ irq number of the AXI UART3 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART3_IRQ
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart3litebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart3litebaseaddress.yml
new file mode 100644
index 0000000000..fe7f8526cb
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart3litebaseaddress.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 0x40630000
+default-by-variant: []
+description: |
+ base address of the AXI UART3 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART3_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart4irq.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart4irq.yml
new file mode 100644
index 0000000000..dbf7e2c787
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart4irq.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 7
+default-by-variant: []
+description: |
+ irq number of the AXI UART4 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART4_IRQ
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuart4litebaseaddress.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuart4litebaseaddress.yml
new file mode 100644
index 0000000000..a10a9c4afb
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuart4litebaseaddress.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 0x40640000
+default-by-variant: []
+description: |
+ base address of the AXI UART4 Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART4_BASE
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuartirq.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuartirq.yml
new file mode 100644
index 0000000000..054388bf8a
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuartirq.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- assert-uint32: null
+- env-assign: null
+- format-and-define: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: 3
+default-by-variant: []
+description: |
+ irq number of the AXI UART Lite
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: BSP_MICROBLAZE_FPGA_UART_IRQ
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuseuart.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart.yml
new file mode 100644
index 0000000000..c3ddd11b78
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: true
+default-by-variant: []
+description: |
+ define if UART is used
+enabled-by: true
+links: []
+name: BSP_MICROBLAZE_FPGA_USE_UART
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuseuart1.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart1.yml
new file mode 100644
index 0000000000..458dc2ec35
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart1.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: false
+default-by-variant: []
+description: |
+ define if UART1 is used
+enabled-by: true
+links: []
+name: BSP_MICROBLAZE_FPGA_USE_UART1
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuseuart2.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart2.yml
new file mode 100644
index 0000000000..c0d5fd6c9b
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart2.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: false
+default-by-variant: []
+description: |
+ define if UART2 is used
+enabled-by: true
+links: []
+name: BSP_MICROBLAZE_FPGA_USE_UART2
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuseuart3.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart3.yml
new file mode 100644
index 0000000000..69cedc993f
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart3.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: false
+default-by-variant: []
+description: |
+ define if UART3 is used
+enabled-by: true
+links: []
+name: BSP_MICROBLAZE_FPGA_USE_UART3
+type: build
diff --git a/spec/build/bsps/microblaze/microblaze_fpga/optuseuart4.yml b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart4.yml
new file mode 100644
index 0000000000..d2b91319f0
--- /dev/null
+++ b/spec/build/bsps/microblaze/microblaze_fpga/optuseuart4.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research Corporation (OAR)
+default:
+- enabled-by: true
+ value: false
+default-by-variant: []
+description: |
+ define if UART4 is used
+enabled-by: true
+links: []
+name: BSP_MICROBLAZE_FPGA_USE_UART4
+type: build
--
2.34.1
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