[PATCH v2 rtems master 2/2] Fix zedboard clock settings

[berndmoessner80 at gmail.com]

From: Bernd Moessner <berndmoesser80gmail.com>

There has been a discussion on this quite some time ago here:

https://rtems-devel.rtems.narkive.com/EoIm4krA/sleep-time-is-doubled-xilinx-zynq-zedboard

However, the issue has never been fixed. As outlined in the
discussion, this must be f_cpu / 2. Thus as long as the
board has an 33.333MHz osc., and the default pll settings are
used, f_cpu equals 666.7 MHz and this setting becomes 333MHz.
---
 spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
index fdee4c0568..ad34974665 100644
--- a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
@@ -9,9 +9,8 @@ default:
 - enabled-by: 
   - arm/xilinx_zynq_zc702
   - arm/xilinx_zynq_zc706
+  - arm/xilinx_zynq_zedboard
   value: 333333333
-- enabled-by: arm/xilinx_zynq_zedboard
-  value: 666666667
 - enabled-by: true
   value: 100000000
 description: |
-- 
2.25.1