[PATCH 2/9] bsps/cache: Simplify Cortex-R5 cache support
Sebastian Huber
sebastian.huber at embedded-brains.de
Tue Apr 23 19:15:48 UTC 2024
Update #4982.
---
bsps/arm/shared/cache/cache-cp15.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/bsps/arm/shared/cache/cache-cp15.c b/bsps/arm/shared/cache/cache-cp15.c
index 88fae2fb1f..92ccfcb276 100644
--- a/bsps/arm/shared/cache/cache-cp15.c
+++ b/bsps/arm/shared/cache/cache-cp15.c
@@ -54,6 +54,10 @@
#define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
#endif
+#if __ARM_ARCH == 7 && __ARM_ARCH_PROFILE == 'R'
+ #define CACHE_CP15_IS_CORTEX_R5
+#endif
+
static inline void _CPU_cache_flush_1_data_line(const void *d_addr)
{
arm_cache_l1_flush_1_data_line(d_addr);
@@ -128,7 +132,9 @@ static inline void _CPU_cache_unfreeze_instruction(void)
static inline void _CPU_cache_flush_entire_data(void)
{
_ARM_Data_synchronization_barrier();
-#if __ARM_ARCH >= 7
+#if defined(CACHE_CP15_IS_CORTEX_R5)
+ arm_cp15_data_cache_clean_level(0);
+#elif __ARM_ARCH >= 7
arm_cp15_data_cache_clean_all_levels();
#else
arm_cp15_data_cache_clean_and_invalidate();
@@ -139,7 +145,9 @@ static inline void _CPU_cache_flush_entire_data(void)
static inline void _CPU_cache_invalidate_entire_data(void)
{
-#if __ARM_ARCH >= 7
+#if defined(CACHE_CP15_IS_CORTEX_R5)
+ arm_cp15_data_cache_all_invalidate();
+#elif __ARM_ARCH >= 7
arm_cp15_data_cache_invalidate_all_levels();
#else
arm_cp15_data_cache_invalidate();
--
2.35.3
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