patches
Ed Sutter
edsutterjr at gmail.com
Tue Jun 30 01:25:54 UTC 2015
Attached is a patch file with
the changes that I think properly init the UART.
Still struggling a bit with git...
I cloned a fresh version, then update files.
Then I *thought* I could run "git format-patch".
It did nothing. :-( Gotta go read more.
Meanwhile, this is just the output of git diff; hopefully
enough for you to apply them.
-------------- next part --------------
diff --git a/ports/beagleboneblack/Makefile b/ports/beagleboneblack/Makefile
index c518092..d70aa4d 100644
--- a/ports/beagleboneblack/Makefile
+++ b/ports/beagleboneblack/Makefile
@@ -63,9 +63,9 @@ COMCSRC = arp.c cast.c cache.c chario.c cmdtbl.c \
start.c struct.c symtbl.c syslog.c tcpstuff.c tfs.c tfsapi.c \
tfsclean1.c tfscli.c tfsloader.c tfslog.c tftp.c timestuff.c \
tsi.c xmodem.c
-CPUCSRC = ldatags.c except_arm.c misc_arm.c strace_arm.c
-IODEVSRC = smsc911x.c uart16550.c fb_draw.c
-FLASHSRC = s29gl512n_16x1.c
+CPUCSRC = except_arm.c misc_arm.c strace_arm.c
+IODEVSRC = uart16550.c
+FLASHSRC =
include $(TOPDIR)/make/objects.make
diff --git a/ports/beagleboneblack/am335x.h b/ports/beagleboneblack/am335x.h
index f203124..97e3bc3 100644
--- a/ports/beagleboneblack/am335x.h
+++ b/ports/beagleboneblack/am335x.h
@@ -17,6 +17,11 @@
#include "bits.h"
+/*=====================================================================================*/
+/* Memory map register base addresses: */
+/*=====================================================================================*/
+#define CONTROL_MODULE_REGBASE 0x44e10000
+#define DDR_PHY_REGBASE 0x44e12000
/*=====================================================================================*/
/* AM335x device identification and feature enumeration */
@@ -900,6 +905,42 @@
#define SD_ADMASAL 0x0258 // ADMA System Address Low bits
#define SD_ADMASAH 0x025C // ADMA System Address High bits
#define SD_REV 0x02FC // Versions
+
+/*=====================================================================================*/
+/* Control Module offsets: */
+/*=====================================================================================*/
+#define CONTROL_REVISION 0
+#define CONTROL_HWINFO 0x4
+#define CONF_GPMC_A5 0x854
+#define CONF_GPMC_A6 0x858
+#define CONF_GPMC_A7 0x85c
+#define CONF_GPMC_A8 0x860
+#define CONF_UART0_RXD 0x970
+#define CONF_UART0_TXD 0x974
+
+#define CONTROL_MODULE(n) *(unsigned long *)(CONTROL_MODULE_REGBASE+n)
+
+/*=====================================================================================*/
+/* Pad control bits: */
+/*=====================================================================================*/
+
+#define SLEWSLOW (1<<6)
+#define SLEWFAST 0
+#define RX_ON (1<<5)
+#define RX_OFF 0
+#define PULLUP (1<<4)
+#define PULLDOWN 0
+#define PULL_OFF (1<<3)
+#define PULL_ON 0
+#define MUXMODE_0 (0&7)
+#define MUXMODE_1 (1&7)
+#define MUXMODE_2 (2&7)
+#define MUXMODE_3 (3&7)
+#define MUXMODE_4 (4&7)
+#define MUXMODE_5 (5&7)
+#define MUXMODE_6 (6&7)
+#define MUXMODE_7 (7&7)
+
/*=====================================================================================*/
#endif /* _AM335X_H_ */
diff --git a/ports/beagleboneblack/config.h b/ports/beagleboneblack/config.h
index a64493c..96391e3 100644
--- a/ports/beagleboneblack/config.h
+++ b/ports/beagleboneblack/config.h
@@ -144,10 +144,6 @@
#define ALLOCSIZE 1024 // (64*1024)
#define MONSTACKSIZE (16*1024)
-// Cogent specific options
-#define INCLUDE_I2C 0
-#define INCLUDE_LCD 0
-
/* Specify inclusion of subsystems within the monitor here.
* Refer to comments in common/monitor/inc_check.h for details on
* each of these macros.
diff --git a/ports/beagleboneblack/cpuio.c b/ports/beagleboneblack/cpuio.c
index 3be316b..2c4e8fb 100644
--- a/ports/beagleboneblack/cpuio.c
+++ b/ports/beagleboneblack/cpuio.c
@@ -1,11 +1,23 @@
#include "config.h"
-#include "stddefs.h"
#include "cpuio.h"
#include "genlib.h"
-#include "cache.h"
+#include "ether.h"
+#include "stddefs.h"
#include "warmstart.h"
-#include "timer.h"
+#include "uart16550.h"
+
+extern ulong getpsr(void);
+extern void putpsr(ulong);
+
+void udelay(int delay)
+{
+ volatile int i;
+ for ( i = LOOPS_PER_USEC * delay; i ; i--);
+}
+/******************************************************
+// getUARTDivisor is called from UART16550.c
+ ******************************************************/
int
getUartDivisor(int baud, unsigned char *hi, unsigned char *lo)
{
@@ -14,106 +26,111 @@ getUartDivisor(int baud, unsigned char *hi, unsigned char *lo)
return(0);
}
-/* devInit():
- * As a bare minimum, initialize the console UART here using the
- * incoming 'baud' value as the baud rate.
- */
-void
+int
devInit(int baud)
{
- /* ADD_CODE_HERE */
+ return 0;
}
-/* ConsoleBaudSet():
- * Provide a means to change the baud rate of the running
- * console interface. If the incoming value is not a valid
- * baud rate, then default to 9600.
- * In the early stages of a new port this can be left empty.
- * Return 0 if successful; else -1.
+/* Referring to table 25-10 of the TRM, install
+ * the RAM exception vectors...
*/
-/*int
-ConsoleBaudSet(int baud)
+void
+ram_vector_install(void)
{
- // ADD_CODE_HERE
- return(0);
-}*/
-
-/* target_console_empty():
- * Target-specific portion of flush_console() in chario.c.
- * This function returns 1 if there are no characters waiting to
- * be put out on the UART; else return 0 indicating that the UART
- * is still busy outputting characters from its FIFO.
- * In the early stages of a new port this can simply return 1.
- */
-/*int
-target_console_empty(void)
+}
+
+void
+pinMuxInit(void)
{
- // if (UART_OUTPUT_BUFFER_IS_EMPTY()) <- FIX CODE HERE
- return(0);
- return(1);
-}*/
-
-/* intsoff():
- * Disable all system interrupts here and return a value that can
- * be used by intsrestore() (later) to restore the interrupt state.
- */
-ulong
-intsoff(void)
+ // Configure GPIO pins tied to four USR LEDS...
+ // GPIO1_21: USER0 LED (D2)
+ CONTROL_MODULE(CONF_GPMC_A5) = SLEWSLOW|RX_ON|PULL_OFF|MUXMODE_7;
+ // GPIO1_22: USER1 LED (D3)
+ CONTROL_MODULE(CONF_GPMC_A6) = SLEWSLOW|RX_ON|PULL_OFF|MUXMODE_7;
+ // GPIO1_23: USER2 LED (D4)
+ CONTROL_MODULE(CONF_GPMC_A7) = SLEWSLOW|RX_ON|PULL_OFF|MUXMODE_7;
+ // GPIO1_24: USER3 LED (D5)
+ CONTROL_MODULE(CONF_GPMC_A8) = SLEWSLOW|RX_ON|PULL_OFF|MUXMODE_7;
+
+ // UART0 RX/TX pins...
+ CONTROL_MODULE(CONF_UART0_RXD) = SLEWSLOW|RX_ON|PULL_OFF|MUXMODE_0;
+ CONTROL_MODULE(CONF_UART0_TXD) = SLEWSLOW|RX_OFF|PULL_OFF|MUXMODE_0;
+}
+
+void
+initCPUio()
{
- ulong status = 0;
+ uint32_t reg;
+
+ // Enable the control module:
+ HWWRITE32(0x44e00404,2);
+
+ // Enable clock for UART0:
+ reg = HWREAD32(0x44e004b4);
+ reg &= ~3;
+ HWWRITE32(0x44e004b4,2);
- /* ADD_CODE_HERE */
- return(status);
+ // For each peripheral block (GPIOX, UARTX, etc...) several
+ // initialization steps must be done..
+ // 1. Establish the pin configuration (pin muxing and setup).
+ // 2. Enable the clock domain associated with that block
+ // See section 8.1.3 "Clock Management", of TRM
+ // See section 25.2 of TRM.
+ // 3. Configure the block-specific stuff.
+ //
+ pinMuxInit();
+ InitUART(115200);
}
-/* intsrestore():
- * Re-establish system interrupts here by using the status value
- * that was returned by an earlier call to intsoff().
+/* target_reset():
+ * Set the counter to 16 ticks before trigger, then enable the
+ * watchdog timer (WDT2) and wait...
*/
void
-intsrestore(ulong status)
+target_reset(void)
{
- /* ADD_CODE_HERE */
}
-/* cacheInitForTarget():
- * Establish target specific function pointers and
- * enable i-cache...
- * Refer to $core/cache.c for a description of the function pointers.
- * NOTE:
- * If cache (either I or D or both) is enabled, then it is important
- * that the appropriate cacheflush/invalidate function be established.
- * This is very important because programs (i.e. cpu instructions) are
- * transferred to memory using data memory accesses and could
- * potentially result in cache coherency problems.
- */
void
-cacheInitForTarget(void)
+intsrestore(psr)
+ulong psr;
{
- /* ADD_CODE_HERE */
}
-/* target_reset():
- * The default (absolute minimum) action to be taken by this function
- * is to call monrestart(INITIALIZE). It would be better if there was
- * some target-specific function that would really cause the target
- * to reset...
+/*
+ * Read the program status register (CPSR)
+ * and set the FIQ and IRQ bits.
+ */
+ulong
+intsoff(void)
+{
+ return(0);
+}
+
+/* show_revision():
+ * Called when the system banner is printed...
*/
void
-target_reset(void)
+show_revision(int center)
{
-// flushDcache(0,0);
-// disableDcache();
-// invalidateIcache(0,0);
-// disableIcache();
- monrestart(INITIALIZE);
}
-/* If any CPU IO wasn't initialized in reset.S, do it here...
- * This just provides a "C-level" IO init opportunity.
+/* target_timer():
+ * Used in conjunction with INCLUDE_HWTMR and TIMER_TICKS_PER_MSEC
+ * to set up a hardware based time base.
*/
+unsigned long
+target_timer(void)
+{
+ return(0);
+}
+
+/* cacheInitForTarget():
+ Enable instruction cache only...
+*/
void
-initCPUio(void)
+cacheInitForTarget()
{
- /* ADD_CODE_HERE */
}
+
diff --git a/ports/beagleboneblack/cpuio.h b/ports/beagleboneblack/cpuio.h
index 2021851..3bb0619 100644
--- a/ports/beagleboneblack/cpuio.h
+++ b/ports/beagleboneblack/cpuio.h
@@ -1,3 +1,17 @@
-#define DEFAULT_BAUD_RATE 38400
+#include "am335x.h"
-#define MONARGV0 "umon"
+#define HWREAD32(a) *(volatile unsigned long *)a
+#define HWREAD16(a) *(volatile unsigned short *)a
+#define HWREAD8(a) *(volatile unsigned char *)a
+
+#define HWWRITE32(a,b) *(volatile unsigned long *)a = b
+#define HWWRITE16(a,b) *(volatile unsigned short *)a = b
+#define HWWRITE8(a,b) *(volatile unsigned char *)a = b
+
+#define LOOPS_PER_USEC 5
+#define DEFAULT_BAUD_RATE 115200
+
+#define USR0_LED GPIO1_21 // Ball V15: GPMC_A5 mode7
+#define USR1_LED GPIO1_22 // Ball U15: GPMC_A6 mode7
+#define USR2_LED GPIO1_23 // Ball T15: GPMC_A7 mode7
+#define USR3_LED GPIO1_24 // Ball V16: GPMC_A8 mode7
diff --git a/ports/beagleboneblack/xcmddcl.h b/ports/beagleboneblack/xcmddcl.h
index 76d5cca..644b074 100644
--- a/ports/beagleboneblack/xcmddcl.h
+++ b/ports/beagleboneblack/xcmddcl.h
@@ -1,5 +1,4 @@
-
-/* extcmddcl.h: */
+/* xcmddcl.h: */
/* This file must exist even if it is empty because it is #included in the */
/* common file cmdtbl.c. The purpose is to keep the common comand table */
/* file (common/cmdtbl.c) from being corrupted with non-generic commands */
@@ -12,20 +11,3 @@ extern int dummycmd(); Function declaration.
extern char *dummyHelp[]; Command help array declaration.
*/
-
-extern int date();
-extern char *dateHelp[];
-
-#if INCLUDE_LCD
-extern int lcd_tst();
-extern char *lcd_tstHelp[];
-#endif
-
-//extern int i2c();
-//extern char *i2cHelp[];
-
-extern int nandCmd();
-extern char *nandHelp[];
-
-extern int ldatags();
-extern char *ldatagsHelp[];
diff --git a/ports/beagleboneblack/xcmdtbl.h b/ports/beagleboneblack/xcmdtbl.h
index 7fb337f..120957e 100644
--- a/ports/beagleboneblack/xcmdtbl.h
+++ b/ports/beagleboneblack/xcmdtbl.h
@@ -1,4 +1,4 @@
-/* extcmdtbl.h: */
+/* xcmdtbl.h: */
/* This file must exist even if it is empty because it is #included in the */
/* common file cmdtbl.c. The purpose is to keep the common comand table */
/* file (common/cmdtbl.c) from being corrupted with non-generic commands */
@@ -8,11 +8,3 @@
/* For example:
"dummy", dummycmd, dummyHelp,
*/
-//{"i2c", i2c, i2cHelp,},
-#if INCLUDE_LCD
-{"lcd_tst", lcd_tst, lcd_tstHelp,},
-#endif
-{"ldatags", ldatags, ldatagsHelp,},
-#if INCLUDE_NANDCMD
-{"nand", nandCmd, nandHelp,},
-#endif
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