Building RTEMS for an MC68F333

[Joel Sherrill]

On Thu, 21 Aug 1997, Robin Kirkham wrote:

> The CPU32 does have a VBR; the 68000 is about the only one that does not.
> However, this problem does not relate to the VBR, but the existance or
> otherwise of a separate stack pointer for interrupts. The issue is, does
> RTEMS care?

Yes.  If the CPU has a separate stack pointer, then you want to utilize
it.  

> > Is this CPU32 core the same one used on the 68360 (QUICC) and 68340 ?
> > If it is then take a look at the configuration for the gen68360 BSP. It might be a
> > better match.
> 
> As I understand things, it is the same CPU32 core as is found in the 68332,
> 340, 360, and others, unless Motorola are using CPU32 to mean "any slightly
> 683xx-ish thing".  I don't think they do that.

My understanding is that there are basically 2 cores in the 683xx family
-- a 68000-ish one and CPU32.  The cpu models are often developed by
different groups and feature sets vary accordingly.  Get a Motorola
Semiconductor to show you the product guide sheet sometime.  It makes more
sense then.

> I'll have a look at the other BSPs tomorrow, but my reading of the CPU
> feature stuff in m68k.h makes me think it won't solve the problem (if indeed
> there is one).

The CPU feature flags are mostly simply booleans.  They ask a question
and you need to answer it for your CPU model.  Add a new one if it doesn't
map onto an existing one.

If the questions are answered correctly, then there shuold not be any
fundamental problems.  A software managed interrupt stack for 68000-ish
cores would be nice though. :)

--joel