MPC8xx exception handling (or is somebody using 4.5 with MPC8xx)
pstrtems at gmx.net
Sat Aug 19 17:48:07 UTC 2000
HongSong Li wrote:
> Check the file "vectors.S" located at
> directory for detail. It already includes external interrupt and further CPM
> handling routines. But CPM interrupt handler is hard-coded at PPC_IRQ_LVL1
> which requires
> BSP to conform with it(see comments in source code). All the codes will be
> linked to .vectors
> section which defined in "link_cmds" file so as to catch up exceptions.
I've seen this file and decided not to use it, because I need the
that the IRQ handling stub-code is only copied into RAM when I install
vectore (like in the
But this code seems to be incomplete, therfore my qeustion.
> ----- Original Message -----
> From: "Peer Stritzinger" <pstrtems at gmx.net>
> To: "RTEMS Users" <rtems-users at oarcorp.com>
> Sent: Wednesday, August 16, 2000 5:17 PM
> Subject: MPC8xx exception handling (or is somebody using 4.5 with MPC8xx)
> > Hi,
> > I'm trying to build a BSP for a MPC850 board using the bare BSP
> > (MPC860) using RTEMS 4.5.0beta3.
> > At the moment I have troubles getting the exception handling to run
> > for the on chip ``external'' interrupts.
> > In the file:
> > there is support for the on chip interrupt handler irq's that are
> > routed to the external interrupt (at 0x500). For example when I want
> > to have a handler for the LVL1 irq I can install it at vector
> > PPC_IRQ_LVL1. This installs a pseudo irq stub but this stub is never
> > called because there is no generic external interrupt handler (that
> > should be installed at 0x500) to reroute the irq to the pseudo stub.
> > Did I miss something?
> > Is anybody using 4.5 with MPC8xx?
> > If yes how are is the on chip interrupt handler used?
> > Peer Stritzinger
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