hi precision timing

Joel Sherrill joel.sherrill at OARcorp.com
Thu Nov 2 00:37:57 UTC 2000



Gregory.D.Menke.1 at gsfc.nasa.gov wrote:
> 
> We're using a mcp750, and would like to get at some of the timers
> available in the chipset.  After wading thru the openpic code, I found
> a few functions that look nice for that purpose.
> 
> - does RTEMS use any of the Raven timers?  If so, are any free for
>   use?

The BSP seems to be using the decrementer register for the clock
tick.  I don't know what else would be using any other timers.

> - Our application needs an incrementing counter for timing at a
>   resolution of 50 to 100us, and we would prefer to poll it rather
>   than have an interrupt.  Is there an RTEMS kernel feature that would
>   expedite setting up this kind of thing?  A fast isr that increments
>   an int somewhere would be fine- I'm mostly wondering if this
>   approach is reasonable.

You could certainly do this but I would think the overhead is worse
than simply reading the chip when you want to know something.  How
often are you going to read it?  

Alternatively, the time base register is 64 bits.  There are macros to 
read that.  See libcpu/powerpc/mpc6xx/clock for some details.

This would be sufficient if you are timestamping, spinning for 
short periods of time, etc.
 
> - Does RTEMS prefer PCI work be done via some internal API, or is
>   direct access down on the bare metal OK?

The RTEMS PCI code is minimal at the moment.  As with all things,
it is better to stick to the API even if you have to augment it.
That way the same code will work on another board/CPU easier.
 
> Thanks,
> 
> Greg

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel at OARcorp.com                 On-Line Applications Research
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