Q powerpc new exception processing.
Eric Valette
valette at crf.canon.fr
Tue Oct 24 09:55:57 UTC 2000
> There is another thing about NEP that I'd like to mention in context of
> proposed transition of all PPC BSPs to NEP. Unlike OEP where exception could
> be dispatched to different handlers by means of registering handler in the
> table managed by common OEP code, in NEP single routine
> (C_dispatch_irq_handler) is called. The default implementation of this routine
> (found in 'libbsp/powerpc/shared/irq/irq.c'), however, seems to be very tied
> to one particular architecture, so many BSPs will be forced to have their own
> exception dispatch implementation. I believe some dispatch policy common to
> all BSPs should be established to make transition of other BSPs to NEP easier.
As the author of the code, I think it is time to jump in. My credo about
the way Exception/Interrupt handling must be coded is :
- Exception are processor dependent (CPU common),
- Interrupt handling is board dependent (BSP),
The fact that the code is in libbsp/powerpc/shared/irq/irq.c, is that
many motorola MVME/MCP board implement openpic (MVME2400, MCP750, ...).
I know at least 4 different motorola board using this implementation.
BUT THE IMPORTANT POINT IS THAT a particular BSP is *able* to implement
its own C_dispatch_irq_handler routine...
Off course we could call a function pointer like it is done on exception
but this is a performance penalty...
Does it helps understanding why I choose the current design?
Have a nice day,
--
__
/ ` Eric Valette - Canon CRF
/-- __ o _. Canon Development Europe Team Leader
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E-mail: valette at crf.canon.fr http://www.crf.canon.fr
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