PowerPC FP handling weakness.

[Eric Valette]

Sergei Organov wrote:
> 
> Eric Valette <valette at crf.canon.fr> writes:
> 
> [...]
> > Why don't you send a patch that does deffered FPU registers saving... In
> > that case enabling FP by default is a non problem since if a task does
> > not use the FPU registers they will not be saved on context switch just
> > when a flotating point execption processing occurs because FPU usage has
> > been disabled...
> 
> I believe that there is no need for such a patch because RTEMS supports
> deferred FPU registers saving for a long time. The problem is that current
> 'printf' implementation does use FP, and it will cause problems when you call
> 'printf' from non-FP task. Enabling FP bit in MSR for non-FP task just hides
> the problem and doesn't solve it. Or maybe I don't understand what you are
> saying?

I'm affraid deffered FPU context switching has never been tested on
60x/7xx. Maybe I can be wrong...
-- 
   __                 
  /  `                   	Eric Valette - Canon CRF
 /--   __  o _.          	Canon Development Europe Team Leader
(___, / (_(_(__         	Rue de la touche lambert
				35517 Cesson-Sevigne  Cedex
				FRANCE
Tel: +33 (0)2 99 87 68 91	Fax: +33 (0)2 99 84 11 30
E-mail: valette at crf.canon.fr	http://www.crf.canon.fr