PPC float context only 4 Bytes per register?

Till Straumann strauman at SLAC.Stanford.EDU
Tue Nov 13 20:28:55 UTC 2001


OK, here it is.

Note that doing a single precision context save/restore
on a double precision PowerPC machine does not only result in
rounding errors but also screws up the FPSCR
register!

-- Till.
-------------- next part --------------
*** rtems-ss-20011025/c/src/lib/libcpu/powerpc/new_exception_processing/cpu_asm.S.orig	Tue Nov 13 11:37:34 2001
--- rtems-ss-20011025/c/src/lib/libcpu/powerpc/new_exception_processing/cpu_asm.S	Tue Nov 13 11:58:48 2001
***************
*** 66,104 ****
  	.set	GP_PC, (GP_CR + 4)
  	.set	GP_MSR, (GP_PC + 4)
  
  	.set	FP_0, 0
! 	.set	FP_1, (FP_0 + 4)
! 	.set	FP_2, (FP_1 + 4)
! 	.set	FP_3, (FP_2 + 4)
! 	.set	FP_4, (FP_3 + 4)
! 	.set	FP_5, (FP_4 + 4)
! 	.set	FP_6, (FP_5 + 4)
! 	.set	FP_7, (FP_6 + 4)
! 	.set	FP_8, (FP_7 + 4)
! 	.set	FP_9, (FP_8 + 4)
! 	.set	FP_10, (FP_9 + 4)
! 	.set	FP_11, (FP_10 + 4)
! 	.set	FP_12, (FP_11 + 4)
! 	.set	FP_13, (FP_12 + 4)
! 	.set	FP_14, (FP_13 + 4)
! 	.set	FP_15, (FP_14 + 4)
! 	.set	FP_16, (FP_15 + 4)
! 	.set	FP_17, (FP_16 + 4)
! 	.set	FP_18, (FP_17 + 4)
! 	.set	FP_19, (FP_18 + 4)
! 	.set	FP_20, (FP_19 + 4)
! 	.set	FP_21, (FP_20 + 4)
! 	.set	FP_22, (FP_21 + 4)
! 	.set	FP_23, (FP_22 + 4)
! 	.set	FP_24, (FP_23 + 4)
! 	.set	FP_25, (FP_24 + 4)
! 	.set	FP_26, (FP_25 + 4)
! 	.set	FP_27, (FP_26 + 4)
! 	.set	FP_28, (FP_27 + 4)
! 	.set	FP_29, (FP_28 + 4)
! 	.set	FP_30, (FP_29 + 4)
! 	.set	FP_31, (FP_30 + 4)
! 	.set	FP_FPSCR, (FP_31 + 4)
  	
  	.set	IP_LINK, 0
  	.set	IP_0, (IP_LINK + 8)
--- 66,114 ----
  	.set	GP_PC, (GP_CR + 4)
  	.set	GP_MSR, (GP_PC + 4)
  
+ #if (PPC_HAS_DOUBLE==1)
+ 	.set	FP_SIZE,	8
+ #define	LDF	lfd
+ #define	STF	stfd
+ #else
+ 	.set	FP_SIZE,	4
+ #define	LDF	lfs
+ #define	STF	stfs
+ #endif
+ 
  	.set	FP_0, 0
! 	.set	FP_1, (FP_0 + FP_SIZE)
! 	.set	FP_2, (FP_1 + FP_SIZE)
! 	.set	FP_3, (FP_2 + FP_SIZE)
! 	.set	FP_4, (FP_3 + FP_SIZE)
! 	.set	FP_5, (FP_4 + FP_SIZE)
! 	.set	FP_6, (FP_5 + FP_SIZE)
! 	.set	FP_7, (FP_6 + FP_SIZE)
! 	.set	FP_8, (FP_7 + FP_SIZE)
! 	.set	FP_9, (FP_8 + FP_SIZE)
! 	.set	FP_10, (FP_9 + FP_SIZE)
! 	.set	FP_11, (FP_10 + FP_SIZE)
! 	.set	FP_12, (FP_11 + FP_SIZE)
! 	.set	FP_13, (FP_12 + FP_SIZE)
! 	.set	FP_14, (FP_13 + FP_SIZE)
! 	.set	FP_15, (FP_14 + FP_SIZE)
! 	.set	FP_16, (FP_15 + FP_SIZE)
! 	.set	FP_17, (FP_16 + FP_SIZE)
! 	.set	FP_18, (FP_17 + FP_SIZE)
! 	.set	FP_19, (FP_18 + FP_SIZE)
! 	.set	FP_20, (FP_19 + FP_SIZE)
! 	.set	FP_21, (FP_20 + FP_SIZE)
! 	.set	FP_22, (FP_21 + FP_SIZE)
! 	.set	FP_23, (FP_22 + FP_SIZE)
! 	.set	FP_24, (FP_23 + FP_SIZE)
! 	.set	FP_25, (FP_24 + FP_SIZE)
! 	.set	FP_26, (FP_25 + FP_SIZE)
! 	.set	FP_27, (FP_26 + FP_SIZE)
! 	.set	FP_28, (FP_27 + FP_SIZE)
! 	.set	FP_29, (FP_28 + FP_SIZE)
! 	.set	FP_30, (FP_29 + FP_SIZE)
! 	.set	FP_31, (FP_30 + FP_SIZE)
! 	.set	FP_FPSCR, (FP_31 + FP_SIZE)
  	
  	.set	IP_LINK, 0
  	.set	IP_0, (IP_LINK + 8)
***************
*** 151,190 ****
  PROC (_CPU_Context_save_fp):
  #if (PPC_HAS_FPU == 1)
  	lwz	r3, 0(r3)
! 	stfs	f0, FP_0(r3)
! 	stfs	f1, FP_1(r3)
! 	stfs	f2, FP_2(r3)
! 	stfs	f3, FP_3(r3)
! 	stfs	f4, FP_4(r3)
! 	stfs	f5, FP_5(r3)
! 	stfs	f6, FP_6(r3)
! 	stfs	f7, FP_7(r3)
! 	stfs	f8, FP_8(r3)
! 	stfs	f9, FP_9(r3)
! 	stfs	f10, FP_10(r3)
! 	stfs	f11, FP_11(r3)
! 	stfs	f12, FP_12(r3)
! 	stfs	f13, FP_13(r3)
! 	stfs	f14, FP_14(r3)
! 	stfs	f15, FP_15(r3)
! 	stfs	f16, FP_16(r3)
! 	stfs	f17, FP_17(r3)
! 	stfs	f18, FP_18(r3)
! 	stfs	f19, FP_19(r3)
! 	stfs	f20, FP_20(r3)
! 	stfs	f21, FP_21(r3)
! 	stfs	f22, FP_22(r3)
! 	stfs	f23, FP_23(r3)
! 	stfs	f24, FP_24(r3)
! 	stfs	f25, FP_25(r3)
! 	stfs	f26, FP_26(r3)
! 	stfs	f27, FP_27(r3)
! 	stfs	f28, FP_28(r3)
! 	stfs	f29, FP_29(r3)
! 	stfs	f30, FP_30(r3)
! 	stfs	f31, FP_31(r3)
  	mffs	f2
! 	stfs	f2, FP_FPSCR(r3)
  #endif
  	blr
  
--- 161,200 ----
  PROC (_CPU_Context_save_fp):
  #if (PPC_HAS_FPU == 1)
  	lwz	r3, 0(r3)
! 	STF	f0, FP_0(r3)
! 	STF	f1, FP_1(r3)
! 	STF	f2, FP_2(r3)
! 	STF	f3, FP_3(r3)
! 	STF	f4, FP_4(r3)
! 	STF	f5, FP_5(r3)
! 	STF	f6, FP_6(r3)
! 	STF	f7, FP_7(r3)
! 	STF	f8, FP_8(r3)
! 	STF	f9, FP_9(r3)
! 	STF	f10, FP_10(r3)
! 	STF	f11, FP_11(r3)
! 	STF	f12, FP_12(r3)
! 	STF	f13, FP_13(r3)
! 	STF	f14, FP_14(r3)
! 	STF	f15, FP_15(r3)
! 	STF	f16, FP_16(r3)
! 	STF	f17, FP_17(r3)
! 	STF	f18, FP_18(r3)
! 	STF	f19, FP_19(r3)
! 	STF	f20, FP_20(r3)
! 	STF	f21, FP_21(r3)
! 	STF	f22, FP_22(r3)
! 	STF	f23, FP_23(r3)
! 	STF	f24, FP_24(r3)
! 	STF	f25, FP_25(r3)
! 	STF	f26, FP_26(r3)
! 	STF	f27, FP_27(r3)
! 	STF	f28, FP_28(r3)
! 	STF	f29, FP_29(r3)
! 	STF	f30, FP_30(r3)
! 	STF	f31, FP_31(r3)
  	mffs	f2
! 	STF	f2, FP_FPSCR(r3)
  #endif
  	blr
  
***************
*** 206,245 ****
  PROC (_CPU_Context_restore_fp):
  #if (PPC_HAS_FPU == 1)
  	lwz	r3, 0(r3)
! 	lfs	f2, FP_FPSCR(r3)
  	mtfsf	255, f2
! 	lfs	f0, FP_0(r3)
! 	lfs	f1, FP_1(r3)
! 	lfs	f2, FP_2(r3)
! 	lfs	f3, FP_3(r3)
! 	lfs	f4, FP_4(r3)
! 	lfs	f5, FP_5(r3)
! 	lfs	f6, FP_6(r3)
! 	lfs	f7, FP_7(r3)
! 	lfs	f8, FP_8(r3)
! 	lfs	f9, FP_9(r3)
! 	lfs	f10, FP_10(r3)
! 	lfs	f11, FP_11(r3)
! 	lfs	f12, FP_12(r3)
! 	lfs	f13, FP_13(r3)
! 	lfs	f14, FP_14(r3)
! 	lfs	f15, FP_15(r3)
! 	lfs	f16, FP_16(r3)
! 	lfs	f17, FP_17(r3)
! 	lfs	f18, FP_18(r3)
! 	lfs	f19, FP_19(r3)
! 	lfs	f20, FP_20(r3)
! 	lfs	f21, FP_21(r3)
! 	lfs	f22, FP_22(r3)
! 	lfs	f23, FP_23(r3)
! 	lfs	f24, FP_24(r3)
! 	lfs	f25, FP_25(r3)
! 	lfs	f26, FP_26(r3)
! 	lfs	f27, FP_27(r3)
! 	lfs	f28, FP_28(r3)
! 	lfs	f29, FP_29(r3)
! 	lfs	f30, FP_30(r3)
! 	lfs	f31, FP_31(r3)
  #endif
  	blr
  
--- 216,255 ----
  PROC (_CPU_Context_restore_fp):
  #if (PPC_HAS_FPU == 1)
  	lwz	r3, 0(r3)
! 	LDF	f2, FP_FPSCR(r3)
  	mtfsf	255, f2
! 	LDF	f0, FP_0(r3)
! 	LDF	f1, FP_1(r3)
! 	LDF	f2, FP_2(r3)
! 	LDF	f3, FP_3(r3)
! 	LDF	f4, FP_4(r3)
! 	LDF	f5, FP_5(r3)
! 	LDF	f6, FP_6(r3)
! 	LDF	f7, FP_7(r3)
! 	LDF	f8, FP_8(r3)
! 	LDF	f9, FP_9(r3)
! 	LDF	f10, FP_10(r3)
! 	LDF	f11, FP_11(r3)
! 	LDF	f12, FP_12(r3)
! 	LDF	f13, FP_13(r3)
! 	LDF	f14, FP_14(r3)
! 	LDF	f15, FP_15(r3)
! 	LDF	f16, FP_16(r3)
! 	LDF	f17, FP_17(r3)
! 	LDF	f18, FP_18(r3)
! 	LDF	f19, FP_19(r3)
! 	LDF	f20, FP_20(r3)
! 	LDF	f21, FP_21(r3)
! 	LDF	f22, FP_22(r3)
! 	LDF	f23, FP_23(r3)
! 	LDF	f24, FP_24(r3)
! 	LDF	f25, FP_25(r3)
! 	LDF	f26, FP_26(r3)
! 	LDF	f27, FP_27(r3)
! 	LDF	f28, FP_28(r3)
! 	LDF	f29, FP_29(r3)
! 	LDF	f30, FP_30(r3)
! 	LDF	f31, FP_31(r3)
  #endif
  	blr
  


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