PPC float context only 4 Bytes per register?

[Thomas Doerfler]

Hi Joel,

> 
> I am at home and have been off a few days so this response 
is from
> memory.  There used to be an ifdef about the size of the FPU 
> registers to save/restore.  AFAIK no CPU had ever set it to
> 64-bits.  I was under the impression that the architecture 
could
> have at least 3 variants for FPU support:
> 
>   + none
>   + 32 bit
>   + 64 bit  

YES.

> 
> If the FPU support is present or 64 bit, then the code needs 
to be
> changed.

YES.

> 
> No big deal from an implementation standpoint, but the 
solution depends
> on what variants are possible.
> 
AFAIK only the MPC601 had a 32 bit FPU, nevertheless 32bit FPU 
is leagal according to the architecture. So all three choices 
should be possible (but only one per cpu model).

> Could someone please answer this from an architectural 
standpoint? :)

I think the only changes needed are to copy the 32/64 bit 
variant store/restore code from old to new exception code (as 
Eruc Valette already pointed out) and to ensure, that the task 
context is big enough for 64 bit variables.

Bye,
	Thomas.
> 
> --joel
> 
> > void fpctxt_tst(void *parm)
> > {
> > volatile double val;
> > register double tst;
> > rtems_interrupt_level l;
> > int     i,j;
> > char    mval[50];
> > 
> >         rtems_interrupt_disable(l);
> >         tst = val = sqrt(2.);
> >         rtems_interrupt_enable(l);
> > 
> >         j=0;
> >         do {
> >                 if (j) rtems_task_wake_after(2);
> >                 j++;
> >                 rtems_interrupt_disable(l);
> >                 i = (tst == val);
> >                 rtems_interrupt_enable(l);
> >         } while( i );
> > 
> >         rtems_interrupt_disable(l);
> >         sprintf(mval,"%.20g",val);
> >         rtems_interrupt_enable(l);
> > 
> >         printf("FP register mismatch in %ith loop, should 
be %s but is
> > %.20g\n",j,mval,tst);
> > }
> > 
> > I must admit that I'm quite a bit shocked -
> > thanks to Thomas for pointing this out. How come that this
> > has been known for a while (see Sergej's message) but not 
fixed?
> > IMO, this deserved at least a 'known-issues' entry or 
similar.
> > 
> > Luckily, it should be easy - is somebody working on this 
already?
> > 
> > -- Till
> > 
> > Thomas Doerfler wrote:
> > 
> > > Hi,
> > >
> > > I have just had some looks into the
> > > libcpu/powerpc/new_exception_processing/cpu_asm.S code 
to
> > > save/restore a floating-point context. In there it seems 
that
> > > for every context switch all the float registers are 
saved
> > > into 4 byte locations (in "single" precision format).
> > >
> > > From my point of view this results in rounding errors 
for
> > > "double precision" (64 bit) float arithmetics. So if I 
have
> > > written some code using "double precision" variables I 
will
> > > get roundoff errors, if there has been a context switch 
during
> > > calculations. (I did not try that out, but it seems 
logical to
> > > me...)
> > >
> > > Did I miss something there?
> > >
> > > Any comments welcome...
> > >
> > >         Thomas Doerfler.
> > > --------------------------------------------
> > > IMD Ingenieurbuero fuer Microcomputertechnik
> > > Thomas Doerfler           Herbststrasse 8
> > > D-82178 Puchheim          Germany
> > > email:    Thomas.Doerfler at imd-systems.de
> > > PGP public key available at: http://www.imd-
> > > systems.de/pgp_key.htm
> 
> -- 
> Joel Sherrill, Ph.D.             Director of Research & 
Development
> joel at OARcorp.com                 On-Line Applications 
Research
> Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>    Support Available             (256) 722-9985

--------------------------------------------
IMD Ingenieurbuero fuer Microcomputertechnik
Thomas Doerfler           Herbststrasse 8
D-82178 Puchheim          Germany
email:    Thomas.Doerfler at imd-systems.de
PGP public key available at: http://www.imd-
systems.de/pgp_key.htm