MPC555 : wrong assembly instruction with GCC

Mon Apr 29 15:33:18 UTC 2002


I managed to compile a program for a MPC555 with GCC and I use SingleStep
from WindRiver to debug it.

But, GCC creates an illegal assembly instruction in the cpu.s file (from
cpu.c file), at the end of function _CPU_ISR_install_raw_handler .
This instruction is " dcbf "  and is about the cache memory.

Unfortunately, the MPC555 doesn't have any instructions or data cache memory
!   :-(

I suppose this problem comes from GCC (maybe the mcpu option). 
I tried the mcpu option with powerpc, power, power2, 603, 505 .... But I
can't find a similar processor with no cache memory for this option.

Does anyone has an idea for this error ?

Thank you !

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