MPC555 : wrong assembly instruction with GCC

[Sergei Organov]

Joel Sherrill <joel.sherrill at OARcorp.com> writes:
> Sergei Organov wrote:
> > 
> > It's not gcc. I believe gcc knows nothing about cache.
> > 
> > Take a look at macro call
> > 
> > _CPU_Data_Cache_Block_Flush( slot );
> > 
> > at the end of the routine -- it's definition contains explicit asm statement
> > containing 'dcbf' instruction.
> 
> In which case, RTEMS needs to wrap this with a conditional on CPU type
> (or better yet move it to libcpu).

Yes, it seems that there are still quite a few issues to be resolved in the
"new exception processing" code...