multitasking question

[mcollins at anchor.sps.mot.com]

Quoting "Michael P. Collins on korat" <mcollins at anchor.sps.mot.com>:

> 
>   To provide some real-world info, I have been using the following
> parameters on a 25MHz MC68331 board over the past few days:
> 
>       #define CONFIGURE_MICROSECONDS_PER_TICK   122
> 
>       /*
>        * Timeslice interval is approx. 20ms.
>        */
>       #define CONFIGURE_TICKS_PER_TIMESLICE 164
> 

Eric Norum:

> It's good to have some hard numbers to work with.  I should have
> preceded my comments with some qualifiers, the most important
> being, ``Maximum clock rates depend heavily on the presence of
> other interrupt sources and the priority of those interrupts''.
> Your example shows that very high clock rates can be tolerated
> by RTEMS.  Did you have any other interrupts enabled during your
> tests?  If so, what were the relative priorities of the other
> interrupts and the clock interrupt?  I would think that other
> interrupts at equal or higher priority might cause some missed
> clock ticks, or at least some pretty bad jitter on the clock
> interrupt latency at this exceptionally high clock rate.

  The only other interrupt enabled at that time is the SCI receiver,
so there isn't much other activity.  The SCI is at a higher priority
than the clock, but gets interrupts only as fast as I can type into
my CLI, I'll soon be doing some more sophisticated testing, and I'll
report back with results.