[patch] m68k/m5200

Ian Caddy ianc at microsol.iinet.net.au
Tue Mar 12 08:40:53 UTC 2002


Hi Ralf,

I have just had a look at the patch, and unfortunately it will not work, or at
least it will not do what it is supposed to do.

The problem is that there are no variations on the swap instruction.  Also, as
you found out, the Coldfire does not support the ROR instruction.

There is no straight forward way to implement a replacement in one
instruction, so I have shown a patch, using C source and let the compiler
choose the best assembler instructions, as to replace an ROR instruction takes
9 instructions, including the saving and restoring of a couple of temporary
registers.

I have verified the patch in a Coldfire 5307 system.  I am new to the patch
thing, so I hope it makes sense to everyone.  (Any information on patch
ettiquite accepted.)

The file location is:

c/src/exec/score/cpu/m68k/rtems/score/m68k.h

Also, please note that I am still running off RTEMS-4.5.0, so I don't know if
there are any other patches to be applied to this file.  I was just looking at
the information that you provided.

I hope this helps,

Ian Caddy


Ralf Corsepius wrote:

> Hi,
>
> I am observing a breakdown with all m5200 based BSPs.
>
> The assembler complains about using invalid asm-instructions:
> ..
> {standard input}: Assembler messages:
> {standard input}:1634: Error: invalid instruction for this architecture;
> needs 68000 or higher -- statement `rorw #8,%d0' ignored
> ..
> Apparent cause is the m68k_swap_u* functions from m68k.h.
>
> Below is my stab on fixing this, however as I am not familiar with the
> m5200, I am not sure if this is correct. Therefore I would like to ask
> those of you being familiar with the m5200-family to comment on this
> patch, rsp. correct it.
>

--

ianc at microsol.iinet.net.au
Microsol (Aust) Pty Ltd

Phone: (+61) 08 9473 6600
Fax:   (+61) 08 9473 6699

-------------- next part --------------
*** Copy of m68k.h	Tue Mar 12 14:41:09 2002
--- m68k.h	Tue Mar 12 15:46:39 2002
***************
*** 332,341 ****
  {
    unsigned int swapped = value;
  
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
    asm volatile( "swap  %0"    : "=d" (swapped) : "0" (swapped) );
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
! 
    return( swapped );
  }
  
--- 332,346 ----
  {
    unsigned int swapped = value;
  
+ #if defined(__mcf5200) || defined(__mcf5200__)
+    swapped = (swapped&0xFFFF0000) | ((swapped&0x00FF)<<8) | ((swapped&0xFF00)>>8);
+    asm volatile( "swap  %0"    : "=d" (swapped) : "0" (swapped) );
+    swapped = (swapped&0xFFFF0000) | ((swapped&0x00FF)<<8) | ((swapped&0xFF00)>>8);
+ #else
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
    asm volatile( "swap  %0"    : "=d" (swapped) : "0" (swapped) );
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
! #endif
    return( swapped );
  }
  
***************
*** 345,352 ****
  {
    unsigned short swapped = value;
  
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
! 
    return( swapped );
  }
  
--- 350,360 ----
  {
    unsigned short swapped = value;
  
+ #if defined(__mcf5200) || defined(__mcf5200__)
+    swapped = ((swapped&0xFF00)>>8) | ((swapped&0x00FF)<<8);
+ #else
    asm volatile( "rorw  #8,%0" : "=d" (swapped) : "0" (swapped) );
! #endif
    return( swapped );
  }
  


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