RTEMS and ARM/Thumb

Joel Sherrill joel.sherrill at OARcorp.com
Mon Feb 10 22:27:29 UTC 2003



Bill Knight wrote:
> 
> This is not specific to RTEMS but gcc & ARM/Thumb processors in
> general.

Thanks.

> gcc prior to 3.0 had seperate compilers for ARM and Thumb modes.
> The two modes are supported with a single compiler w/ gcc 3.0 & newer.

And FWIW probably in gcc 3.3 and definitely in 3.4, the mips 32/64 bit
modes will also co-exist.

> ARM & Thumb instructions can be mixed within assembly source files but
> not within C source files.

The ARM assembly code I have looked at is conditionally compiled to be 
either ARM or THUMB.  I am thinking that most of RTEMS will be OK and
that all that will be required is to address the tiny bit of
assembly code as follows

  cpu_asm:
    + conditionally compile context switch for THUMB
    + ISR handling code should be OK since CPU switches into ARM mode
  rest:  
    + fix BSP specific start.S
    + other code is in C so will be OK

THe nice thing about the RTEMS portability design and its implementation
is that the compiler takes care of most problems like this for us. :)

> Thumb mode does offer some very nice benefits.  For one, it is about
> 30% smaller.  The other real nice feature is that for processors
> executing code over an external 16-bit data path, Thumb mode is
> also to be about 30% faster.  For 32-bit data path processors with
> lots of memory, ARM mode is faster.

I noticed my dummy C function:

  extern int Y;
  int f( int x ) { Y++; return x+Y; }

went from 68 bytes (ARM) to 40 bytes (THUMB).  Pretty significant.

--joel

> Regards
> -Bill Knight
> R O SoftWare
> 
> On Mon, 10 Feb 2003 14:29:29 -0600, Joel Sherrill wrote:
> 
> >Jay Monkman wrote:
> >>
> >> On Mon, Feb 10, 2003 at 10:13:59AM -0600, Joel Sherrill wrote:
> >> > Does anyone out there have experience using the Thumb instructions
> >> > with RTEMS?
> >>
> >> I haven't used thumb mode, but I think there are some difficulties
> >> you'll have to work around.
> >>
> >> The last time I checked, gcc could generate ARM or THUMB instructions,
> >> but not both. If that's true, you'll need different compilers for
> >> exceptions (since they run in ARM mode) and everything else. You might
> >> need different assemblers as well.
> 
> >The arm-rtems-gcc multilibs for ARM and Thumb so I think it is OK
> >to use a single compiler but being an either ARM or THUMB situation
> >makes sense.
> 
> >Sounds like all assembly will have to be modified to be conditionally
> >compiled for THUMB mode.  Newlib has a lot of that in its assembly.
> >C code will take care of itself.
> 
> >> Since exceptions always start in ARM mode, the current handlers would
> >> have to modified.
> 
> >But since they are calling THUMB ISR Handlers, they would have to
> >honor that, right?  And they wouldn't have to save as much context
> >since there aren't as many registers, right?
> 
> >Thanks Jay.  Any insight would be appreciated.
> 
> >>   ------------------------------------------------------------------------
> >>    Part 1.2Type: application/pgp-signature
> 
> >--
> >Joel Sherrill, Ph.D.             Director of Research & Development
> >joel at OARcorp.com                 On-Line Applications Research
> >Ask me about RTEMS: a free RTOS  Huntsville AL 35805
> >Support Available                (256) 722-9985

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel at OARcorp.com                 On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985



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