MCP750 PCI

[gregory.menke at gsfc.nasa.gov]

Hi,

We're working up some compact pci based 1553 tranceivers for RTEMS-
actually a PMC card and a cpci board- both the same chipsets.  I can
find them on the bus OK, but am having some problems getting the
address decoding right.

I used the dec21140 ppc support as a model, but I'm seeing strangely
close but wrong results.  The pci devices implement 3 memory mapped
address ranges that I've confirmed the sizes of and signature values
for via writing a Linux driver (which runs fine under ppc linux on the
target mcp750), so I know the problem is something to do with my base
address computation in RTEMS.

I implement it by reading the base address, writing 0xffffffff and
reading to find the size (which is right), then rewriting the base
address back.  I then reference the space with the ld_ & st_ macros as
defined by the bsp.  For the address in those macros, I use the (base
address & ~0xf) + the pci memory offset, and then add the byte offset
to the register I want.  This seems to correspond to how the dec21140
driver does it but I'm not getting reasonable results.

I checked the pci command and status registers, which yield plausible
values from which it seems the card is enabled.  The base address
registers produce reasonable values too- at least they end up in the
regions configured by the bsp.

Thanks for any pointers,

Gregm