Which MPC74xx PrPMC board?

Feng, Shuchen feng at bnl.gov
Mon Oct 13 11:58:50 UTC 2003


Joel Sherrill wrote : 


> I look forward to seeing this one submitted.   :)

Thanks.  We were told that the board is in high
demand, which might explain why it is cost
competitive. We decided on the MVME5500 because
we wanted to have a board that seems to be promising
for a long life cycle. We can use the MVME5500
with a VME,a VMe64(x), or even a VXS (the future)
crate. For the long range, it is economical for
us to standerize between the low-end and high-end
application.


> Are you able to make this another variant of the
> motorola_powerpc BSP?

That is the direction I tried to head for. I had to
add L3 cache support in the bspstart.c.  The L2
definition and flushings are different, too.
Besides, the following
codes in the libbsp/powerpc/shared/startup/bspstart.c
bothers me :

  l2cr = get_L2CR();
  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
    set_L2CR(0xb9A14000);


I did not power up the mvme5500 for testing the L2CR
yet.  However, by the book, for the 7455, I changed
it to  :

if ( (! (l2cr & 0x80000000)) && ((int) l2cr != -1))

And in the 
libbsp/powerpc/shared/startup/mmuAsm.S

For the get_L2CR(), I returned -1 instead of 0 for CPU
that does not support L2.

Did I change the original meaning or intention by doing
so ?

The rest of codes for the cache handling looks good too
me.


Anway, 1) I am not supposed to count any chicken
before it is hatched.  I posted the message
hoping collaboration instead of duplication.
2) I have no full document yet. 
The release of the technical document for the
marvell discovery contoller requires a
Non Disclosure Agreement (NDA) signed.
Based on the E-mail from the attorney on site,
I might obtain an access to the document
sometimes this week, which is hard for me
to believe.


Regards,
Kate



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