PCI mmap - How do I access a PCI board address space?

[Eric Valette]

gregory.menke at gsfc.nasa.gov wrote:
> 
> Look at the RTEMS network drivers, in c/src/lib/libchip/network,
> several of them support PCI addressing both for PPC and x86.
> 
> In general, PCI memory access is just the same as regular ram, except
> there are address translations involved.  The address you get from the
> card's base address register is in "pci space", meaning some region in
> a 2^32 space.  The processor has a different perspective on memory
> because everything is "downstream" from it, including the pci space.
> On the PPC, the PCI chipset implements a register pair that identifies
> the range of addresses as seen by the processor that will be applied
> to the PCI bus.  So, to translate the base address given by the board,
> you add the lower bound of the region to it, shifting the PCI address
> into the region that the processor is decoding as PCI.  Then, accesses
> into that region are directed towards the PCI bus.  Its all memory
> accesses from the perspective of the processor.
> 
> Secondly, using memcpy or pointer dereferencing to manipulate data in
> pci space is not portable, it will probably work on many
> architectures, but its better to use the IO primitives given by RTEMS,
> just like you would in Linux.  They come in 8, 16 and 32 bit
> variations and will handle endianness properly on big endian
> processors.
> 
> 
> Gregm

I would like to add to this that for IX86, as registers access region 
must be mapped non cacheable and the processor does not support cache 
manipulation without the mmu, you also need to remap the memory address 
range non cacheabke via mmu. As pointed out by gregory, the network code 
has examples of all this.

-- 
    __
   /  `                   	Eric Valette
  /--   __  o _.          	6 rue Paul Le Flem
(___, / (_(_(__         	35740 Pace

Tel: +33 (0)2 99 85 26 76	Fax: +33 (0)2 99 85 26 76
E-mail: eric.valette at free.fr