RTEMS 4.6 and tools
Thomas Rauscher
trauscher at loytec.com
Tue Jan 20 15:40:01 UTC 2004
I'm sorry if somebody gets this message twice. At my first attempt
the attachment was rejected, so I've put the patch inline the message
body.
> -----Original Message-----
> From: Steven Johnson [mailto:sjohnson at neurizon.net]
> Sent: Monday, January 19, 2004 8:56 AM
> To: rtems-users at rtems.com
> Subject: RTEMS 4.6 and tools
>
> Hi,
>
> Im trying to use RTEMS 4.6 currently with a target that will
> run ARM and Thumb
> code. This requires thumb-interworking. Unfortunaltey the
> libraries and gcc for
> rtmes as built are not enabled for arm-thumb interworking.
>
> Is it possible, before release to have the tools rebuilt
for arm with
> --enable-interworking option, which will build all the
> multilib libraries that
> will allow arm and thumb code to co-exist. As it stands, the
> thumb libraries
> are unusable because memcpy is an arm function in the thumb
> library, and cant be
> linked to from thumb code.
>
I've attached a file patching memcpy.S in newlib (with the
rtems/newlib patch) to my current version.
It makes the following improvements:
1) Removes the wrappers saving r0, r12 and lr.
r0 is maintained my memcpy itself.
I've once scanned the code for any return path thrashing r0
and couldn't find one. Please correct me if I'm wrong.
According to the ATPCS, r12 can be used as scratch register.
Warning: This change not compatible with the official
RTEMS/ARM port which requires r12 to be saved.
2) Provides a quick entry from thumb code if __thumb__ is defined.
This is (currently) faster than GCC's interworking.
3) Provides thumb-aware return instructions if
__THUMB_INTERWORK__ is defined
4) Corrects shift directions for big endian machines.
5) Does not return NULL, if len==0. Always returns dst.
> BTW, has anyone tried building rtems on a arm-thumb target
> before? I know the
> assembly that has to change (in RTEMS) to eliminate the
> inline ARM code, but are
> there any other gotchas I should be aware of.
>
I've posted our ARM support code to the mailing list some time ago
(last February I think). It should be on the RTEMS FTP server, but I
cannot find it again.
If the archive has been lost, I can make another snapshot.
Thomas.
--
Thomas Rauscher
LOYTEC electronics GmbH
Stolzenthalergasse 24/3
A-1080 Wien
Austria/Europe
trauscher at loytec.com
www.loytec.com
Phone: +43-1-4020805-15
FAX: +43-1-4020805-99
diff -r1.1 memcpy.S
46,64d45
< /*
< .globl memcpy
< memcpy:
< */
< ENTRY(memcpy)
< stmfd sp!, {r0, r12, lr}
< bl _memcpy
< ldmfd sp!, {r0, r12, pc}
<
<
< /*
< .globl memove
< memmove:
< */
< ENTRY(memmove)
< stmfd sp!, {r0, r12, lr}
< bl _memcpy
< ldmfd sp!, {r0, r12, pc}
<
97a79,87
> #if defined(__ARMEL__)
> #define LSHIFT lsl
> #define RSHIFT lsr
> #elif defined(__ARMEB__)
> #define LSHIFT lsr
> #define RSHIFT lsl
> #else
> #error "Undefined endianess"
> #endif
102c92,105
< ENTRY(_memcpy)
---
> /* Provide a branch and exchange instruction in thumb mode.
> * This is faster than using the interworking code. */
> #if defined(__thumb__)
> .thumb_func
> ENTRY(memcpy)
> ENTRY(memmove)
> bx pc
> nop
> .arm
> #else
> ENTRY(memcpy)
> ENTRY(memmove)
> #endif
>
107c110,111
< moveq r0, #0 /* Quick abort for len=0 */
---
> /* moveq r0, #0 */ /* Quick abort for len=0 */
> #ifndef __THUMB_INTERWORK__
109c113,115
<
---
> #else
> bxeq lr
> #endif
165a172
> #ifndef __THUMB_INTERWORK__
166a174,177
> #else
> ldmeqia sp!, {r0, lr} /* done */
> bxeq lr
> #endif
175a187
> #ifndef __THUMB_INTERWORK__
176a189,192
> #else
> ldmia sp!, {r0, lr}
> bx lr
> #endif
210c226
< mov r3, lr, lsr #8
---
> mov r3, lr, RSHIFT #8
212,218c228,234
< orr r3, r3, r4, lsl #24
< mov r4, r4, lsr #8
< orr r4, r4, r5, lsl #24
< mov r5, r5, lsr #8
< orr r5, r5, r12, lsl #24
< mov r12, r12, lsr #8
< orr r12, r12, lr, lsl #24
---
> orr r3, r3, r4, LSHIFT #24
> mov r4, r4, RSHIFT #8
> orr r4, r4, r5, LSHIFT #24
> mov r5, r5, RSHIFT #8
> orr r5, r5, r12, LSHIFT #24
> mov r12, r12, RSHIFT #8
> orr r12, r12, lr, LSHIFT #24
227c243
< mov r12, lr, lsr #8
---
> mov r12, lr, RSHIFT #8
229c245
< orr r12, r12, lr, lsl #24
---
> orr r12, r12, lr, LSHIFT #24
245c261
< mov r3, lr, lsr #16
---
> mov r3, lr, RSHIFT #16
247,253c263,269
< orr r3, r3, r4, lsl #16
< mov r4, r4, lsr #16
< orr r4, r4, r5, lsl #16
< mov r5, r5, lsr #16
< orr r5, r5, r12, lsl #16
< mov r12, r12, lsr #16
< orr r12, r12, lr, lsl #16
---
> orr r3, r3, r4, LSHIFT #16
> mov r4, r4, RSHIFT #16
> orr r4, r4, r5, LSHIFT #16
> mov r5, r5, RSHIFT #16
> orr r5, r5, r12, LSHIFT #16
> mov r12, r12, RSHIFT #16
> orr r12, r12, lr, LSHIFT #16
262c278
< mov r12, lr, lsr #16
---
> mov r12, lr, RSHIFT #16
264c280
< orr r12, r12, lr, lsl #16
---
> orr r12, r12, lr, LSHIFT #16
280c296
< mov r3, lr, lsr #24
---
> mov r3, lr, RSHIFT #24
282,288c298,304
< orr r3, r3, r4, lsl #8
< mov r4, r4, lsr #24
< orr r4, r4, r5, lsl #8
< mov r5, r5, lsr #24
< orr r5, r5, r12, lsl #8
< mov r12, r12, lsr #24
< orr r12, r12, lr, lsl #8
---
> orr r3, r3, r4, LSHIFT #8
> mov r4, r4, RSHIFT #24
> orr r4, r4, r5, LSHIFT #8
> mov r5, r5, RSHIFT #24
> orr r5, r5, r12, LSHIFT #8
> mov r12, r12, RSHIFT #24
> orr r12, r12, lr, LSHIFT #8
297c313
< mov r12, lr, lsr #24
---
> mov r12, lr, RSHIFT #24
299c315
< orr r12, r12, lr, lsl #8
---
> orr r12, r12, lr, LSHIFT #8
359a376
> #ifndef __THUMB_INTERWORK__
360a378,380
> #else
> bxeq lr /* done */
> #endif
369a390
> #ifndef __THUMB_INTERWORK__
370a392,394
> #else
> bx lr
> #endif
402c426
< mov lr, r3, lsl #8
---
> mov lr, r3, LSHIFT #8
404,410c428,434
< orr lr, lr, r12, lsr #24
< mov r12, r12, lsl #8
< orr r12, r12, r5, lsr #24
< mov r5, r5, lsl #8
< orr r5, r5, r4, lsr #24
< mov r4, r4, lsl #8
< orr r4, r4, r3, lsr #24
---
> orr lr, lr, r12, RSHIFT #24
> mov r12, r12, LSHIFT #8
> orr r12, r12, r5, RSHIFT #24
> mov r5, r5, LSHIFT #8
> orr r5, r5, r4, RSHIFT #24
> mov r4, r4, LSHIFT #8
> orr r4, r4, r3, RSHIFT #24
419c443
< mov r12, r3, lsl #8
---
> mov r12, r3, LSHIFT #8
421c445
< orr r12, r12, r3, lsr #24
---
> orr r12, r12, r3, RSHIFT #24
437c461
< mov lr, r3, lsl #16
---
> mov lr, r3, LSHIFT #16
439,445c463,469
< orr lr, lr, r12, lsr #16
< mov r12, r12, lsl #16
< orr r12, r12, r5, lsr #16
< mov r5, r5, lsl #16
< orr r5, r5, r4, lsr #16
< mov r4, r4, lsl #16
< orr r4, r4, r3, lsr #16
---
> orr lr, lr, r12, RSHIFT #16
> mov r12, r12, LSHIFT #16
> orr r12, r12, r5, RSHIFT #16
> mov r5, r5, LSHIFT #16
> orr r5, r5, r4, RSHIFT #16
> mov r4, r4, LSHIFT #16
> orr r4, r4, r3, RSHIFT #16
454c478
< mov r12, r3, lsl #16
---
> mov r12, r3, LSHIFT #16
456c480
< orr r12, r12, r3, lsr #16
---
> orr r12, r12, r3, RSHIFT #16
472c496
< mov lr, r3, lsl #24
---
> mov lr, r3, LSHIFT #24
474,480c498,504
< orr lr, lr, r12, lsr #8
< mov r12, r12, lsl #24
< orr r12, r12, r5, lsr #8
< mov r5, r5, lsl #24
< orr r5, r5, r4, lsr #8
< mov r4, r4, lsl #24
< orr r4, r4, r3, lsr #8
---
> orr lr, lr, r12, RSHIFT #8
> mov r12, r12, LSHIFT #24
> orr r12, r12, r5, RSHIFT #8
> mov r5, r5, LSHIFT #24
> orr r5, r5, r4, RSHIFT #8
> mov r4, r4, LSHIFT #24
> orr r4, r4, r3, RSHIFT #8
489c513
< mov r12, r3, lsl #24
---
> mov r12, r3, LSHIFT #24
491c515
< orr r12, r12, r3, lsr #8
---
> orr r12, r12, r3, RSHIFT #8
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