Application for HCS12

HDL-MikeFriedrichs m_friedrichs at
Tue Jul 6 15:55:29 UTC 2004

Thanks for your encouragement.  I will port RTEMS over to the HCS12.


At 09:38 07/06/2004, Joel Sherrill <joel at> wrote:

>Sorry for not getting to you personally.  I have been on a tight
>deadline just before a holiday.
>HDL-MikeFriedrichs wrote:
>>I have been tasked with finding a RTOS for a Motorola HCS12, 16 bit 
>>Is the RTEMS a good fit for this device, or I am I expecting too much 
>>from this 16 bit micro-controller?
>I don't think you are expecting too much.  Given a good gcc port and
>a simulator, a port can be done fairly painlessly.  Most of the effort
>is in .h code describing the processor -- stack grows up/down, has an
>FPU, etc.  The only assembler code is usually the context switch and
>interrupt processing.  And on some CPUs, this has even been done in
>C.  The SuperH (SH) and TI C3x/C4x DSPs do the interrupt dispatching in
>C.  The core of the MIPS interrupt vector selection is CPU model
>dependent and usually in C.
>>This device has 16 bit registers, 64 Mbyte of flash, 4Kbytes of ram, and 
>>paged memory expansion, running a 24Mhz bus.
>The 16 bit part is not a problem.  There is a port to the Reneas
>(Hitachi) H8 series.
>RTEMS uses a stack per task and some memory itself for housekeeping.
>4K of RAM is light.  RAM usage is proportional to the number of RTEMS
>objects created.  Flash usage is going to be proportional to the
>number of services used.  Each port selects the minimal stack size.
>You can run every non-networked RTEMS test in less than 256K of code
>space.  Offhand, I would guess that the worst RAM usage in a test
>is one of the timing tests which creates 100 tasks.
>With external RAM, there should not be a problem.
>Joel Sherrill, Ph.D.             Director of Research & Development
>joel at                 On-Line Applications Research
>Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>    Support Available             (256) 722-9985

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