Timing of events in an ISR

[Bruce Robinson]

Hi Mark,

Is your code built for mips1 or mips3? If it's mips3, I found a problem
today in the MIPS status register code that you might want to consider.

In RTEMS the default Idle task is created with all interrupts enabled. This
was allowing undesirable interrupts to occur on my MIPS evaluation board. I
made some changes in the _Thread_Create_idle function to set a non-zero
interrupt level in the idle task. This should have resulted in the status
register being set to only have specified interrupts enabled.

The code didn't run and I discovered that all interrupts were disabled in
the idle task. After some time I found what appears to be a flaw in the
_CPU_ISR_Set_level function in cpu.c. The following statement:

  sr = srbits | ((new_level==0)? (0xfc00 | SR_EXL | SR_IE): \
		 (((new_level<<9) & 0xfc00) | \
		  (new_level & 1)?(SR_EXL | SR_IE):0));

is missing a set of parentheses on the last line. The '|' has precedence
over the '?:' operator. I changed the code to the following and everything
worked fine:

  sr = srbits | ((new_level==0)? (0xfc00 | SR_EXL | SR_IE): \
		 (((new_level<<9) & 0xfc00) | \
		  ((new_level & 1)?(SR_EXL | SR_IE):0)));

A similar statement in the macro _CPU_Context_Initialize in cpu.h appears to
be correct:

	(_the_context)->c0_sr = ((_intlvl==0)?(0xFF00 | _INTON):( ((_intlvl<<9) &
0xfc00) | \
						       0x300 | \
						       ((_intlvl & 1)?_INTON:0)) ) | \
				SR_CU0 | ((_is_fp)?SR_CU1:0) | _EXTRABITS;

This may not be an issue if your using the default interrupt level of 0, but
you may run in to this problem if you try setting it to a non-zero value.

Best Regards,
Bruce



> -----Original Message-----
> From: Mark VanderVoord [mailto:markvandervoord at yahoo.com]
> Sent: Tuesday, October 19, 2004 4:13 AM
> To: rtems-users at rtems.com
> Subject: Re: Timing of events in an ISR
>
>
> OK, all my tasks have been declared with the following
> mode:
>
> RTEMS_PREEMPT |
> RTEMS_INTERRUPT_LEVEL(0) |
> RTEMS_TIMESLICE |
> RTEMS_NO_ASR
>
> According to the MIPS supplement, interrupt level 0
> means that it should allow all interrupts, so I
> believe that these settings are correct.
>
> I've also tried to create them all with
> RTEMS_DEFAULT_MODE, with the same effect.
>
> This morning, I changed the setup so that only this
> task is launched from Init.  Init then suspends itself
> as before.  This also has the same effect.
>
> Finally, I added a mode change to the init task, right
> before I suspend it, to make its mode preemptable and
> interrupt level 0.  Again, no change.  I can rework
> things so that the Init task is deleted if you think
> that will help, but I believe this test shows that it
> is not the issue.
>
> Mark S VanderVoord
> Self-Guided Systems, LLC
>
>
>
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