Development Plan Proposal for Unifying Interrupt and PCI APIs

[Steve Holle]

I might be jumping into the middle of something I don't fully understand 
but that hasn't stopped me yet.

It seems to me that the irq specifics must be pushed out to the BSP and the 
interface exposed to RTEMS be as simple as possible so as not to add any 
undue performance degradation at the common interface.  Below that, each 
BSP must provide a conversion layer that, at the interface, looks just lie 
another vector, no matter what the complexity of decoding that vector or 
what the underlying method of installation is in actuality.  Underneath 
eight interrupts might be connected to an 8059 and generate one physical 
interrupt to the processor but that interface needs to be optimized inside 
the BSP interface and should be completely transparent to the RTEMS 
interface, each 8259 interrupt resulting in one RTEMS vector.

My suggestion would be to hide the hardware and provide the thinnest 
interface possible on the RTEMS side.



Steve Holle
Link Communications, Inc.
1035 Cerise Rd.
Billings, MT  59101
sholle at link-comm.com