PowerPC Burst PCI access

[Peter Dufault]

On Apr 7, 2005, at 11:23 PM, Feng, Shuchen wrote:

> Hi Peter,
>
> The whole 512MB of memory on the mvme5500 is cachable.  The 1GHZ NIC
> is on the PCI.  It's performance is slightly higher than that of the
> vxWorks at this point even though I think a patch in the RTEMS might
> even make it higher. If anyone is interested in the data, I will
> post it.
>
>
> The mvme5500 has eight DMAs, more than enough.

Are these on the GT64260?  Can you point to an interface to get at them?
>
>
> I do not think you updated your PCI to the unified PCI yet.

I have not, this weekend I will.

> If so, can you do PCIx_read_config_dword(1,0,10,0, offset, &data)
> by setting  offset from 0 to 0x40 at an interval of 4 ?
> For example :
> PCIx_read_config_dword(1,0,10,0,0, &data)
> PCIx_read_config_dword(1,0,10,0,4, &data)
> ...
> ...
> PCIx_read_config_dword(1,0,10,0,0x40, &data)
>
>
> What is all the returned value ?
> Also what does inl(0xc00) and  inl(0xc80)
> return ?

Do you mean "If so" or "If not"?  I assume you mean "If not", since I 
thought the "PCIx_*" functions were going away.

Anyway, I'll look later today when I'm at my client and email to you 
privately.
>
>
> To digress a moment, is the code you wrote for
> PMCspan sharable by the RTEMS community ?
>

Yes and maybe - in general, the PMCSPAN will work as long as the bus 
counting is OK and the DEC controller is recognized.  This weekend I'll 
take your new release and if it doesn't work make it work and send the 
changes back to you.  The PMC drivers for the two Acromag boards are 
still being thought over by the client but I think they'll agree to 
release them.  A big warning in advance to anyone hoping to use them: I 
only added exactly what I needed and no more.  For example, you can 
only read either 8 or 16 channels and in order - I didn't add any 
general purpose code.  It is still better than starting from scratch, 
though.

Peter

Peter Dufault
HD Associates, Inc.