RTEMS on AVR?

[Evgeny Belyanco]

Thursday, August 4, 2005, 7:02:07 PM, you wrote:

PE> In applications where 16K of RAM is enough, I agree that a "micro RTEMS"
PE> would be a great alternative to Salvo or UCOS. Having used RTEMS on a 68K
PE> with 128K RAM I think it should be possible, especially if not all the
PE> managers are used (just semaphores, queues, and the scheduler perhaps?)

Highest announced AVR will have 8KB SRAM (ATmega1280, ATmega1281,
ATmega2560, ATmega2561). IMHO, using AVR with external
memory will drop all AVR features (additional chip increase cost,
pins will be used for system purposes, board space increase, EMI
immunity decrease).

I think, 16KB - it is for ARM.

Another very interesting chip for applying forces is ST STR91xF

** 16/32-bit 96 MHz ARM9E based MCU
* ARM966E-S RISC core: Harvard architecture,
5-stage pipeline, Tightly-Coupled
Memories (SRAM and Flash)
* STR91xF implementation of core adds high speed
burst Flash memory interface,
instruction prefetch queue, branch cache
* Up to 80 MIPS directly from Flash memory
* Single-cycle DSP instructions are supported
* Binary compatible with 16/32-bit ARM7 code

** Dual Burst Flash Memories, 32-bits wide
* 256KB/512KB Main Flash, 32KB 2nd Flash
* Sequential Burst operation up to 75 MHz
* 100K min erase cycles, 20 yr min retention

** SRAM, 32-bits wide
. 64K or 96K bytes, optional battery backup

** 11 Communication Interfaces
* 10/100 Ethernet MAC with DMA and MII port
* USB 2.0 Full Speed (12 Mbps) slave device
* CAN interface (2.0B Active)
* 3 16550-style UARTs with IrDA protocol
* 2 Fast I2C., 400 kHz
* 2 channels for SPI., SSI., or Microwire.
* 8/16-bit EMI bus on 128 pin packages

It will be available in the end of this year.

IMHO, chip like this will increase interest to RTEMS, because RAM
resources is enough (as I understand, this is enough even for BSD
sockets), and you will receive really SOC (in ONE chip!) with real
RTOS without any external component (just add you own interfaces such
as analog amplifiers to DAC/ACD, communication channel drivers, etc).

As for me, I will be happy to found complete BSP for this chip with
all drivers (CAN, I2C, etc). In case some company will make eval kit,
based on this chip (and price 100...200$ - I think, this will be
real, because board will have only _one_chip), with RTEMS port in
stead of traditional uCOS-II, many thousands of new customers will be
involved in RTEMS area.

I am looking for RTEMS about half year. I am very impressed by this
project:
* quality of doc
* ready toolchain fall almost all hosts & targets. You will use the
same toolchain as creator of OS!
* license
* philosophy

but now we are using uCOS for small ARM and Linux for middle system.

Reason are:
* small systems - we need real SOC without external SRAM
* middle systems - in case of having external SRAM or SDRAM no problem use
16Mbyte SRAM -> Linux is more convenient for as.

As I know, Philips are preparing something like STR91xF.

Evgeny Belyanco
Chief Designer KB KCC
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