Strange bug on EP9302-based custom board

[Jay Monkman]

Fabien CASAS wrote:
> Well, 10µs would be great regarding the final goal of the board (I2C and
> OSLink comm.). And there's still the solution to speed up the EP9302 (up
> to 200MHz).
> 50ms is definitely poor performance, but I'm not sure it's the lowest
> working value.

What do I2C and OSLink have to do with the tick rate? Do you plan on doing
something like this?
	for (bit = 0; bit < 10; bit++) {
		write_i2c_bit(word[bit]);
		write_i2c_clock();
		rtems_task_wake_after(1);
	}

That's a real waste of CPU time. You'll end up spending a significant amount of
time in interrupt processing.
	
10ms is the default tick rate for RTEMS, and a pretty standard tick rate for
other OSes. Until recently, that was the rate for Linux on x86.


> 
> I did no special effort for the clock ISR design: just stop the counter,
> call rtems_clock_tick(), then reload the counter.
> I will try to find if my ISR gets interrupted with a tick at 10ms.

That's a little odd. Why stop the counter? If you're going to stop it, then do
so right before reloading it. Otherwise your time will drift.