gettimeofday seconds rollover problem?

[Joel Sherrill]

Eric Norum wrote:

> On Feb 24, 2006, at 1:16 AM, Andrew Sinclair wrote:
>
>>
>> 1) interesting...
>> 2) I think an alternative here is adding all the registers to the
>> clobber list in the "barrier", we can force the compiler to reload any
>> data into registers, and perform stores within the critical sections.
>>
>> 3) Yes, on second thoughts I think you have something here. It is  safer
>> as one single asm volatile statement.
>>
>>
>> For example on the Coldfire...
>>
>> #define m68k_disable_interrupts( _level ) \
>>     do { register unsigned32   _tmpsr = 0x0700; \
>>          asm __volatile__ ( "move.w %%sr,%0\n\t" \
>>                  "or.l   %0,%1\n\t" \
>>                  "move.w %1,%%sr" \
>>                  : "=d" (_level), "=d"(_tmpsr) : "1"(_tmpsr) \
>>                  :"cc","d0","d1","d2","d3","d4","d5", \
>>                 "a0","a1","a2","a3","a4","a5","a6","memory" ); \
>>     } while( 0 )
>>
>> #define m68k_enable_interrupts( _level ) \
>>     do { asm __volatile__ ( "move.w  %0,%%sr " : : "d" (_level) \
>>        :"cc","d0","d1","d2","d3","d4","d5", \
>>        "a0","a1","a2","a3","a4","a5","a6","memory" ); \
>>     } while( 0 )
>>
>> #define m68k_flash_interrupts( _level ) \
>>    do { register unsigned32 _tmpsr = 0x0700; \
>>         asm __volatile__ ( "move.w %2,%%sr\n\t" \
>>                "or.l   %2,%1\n\t" \
>>                "move.w %1,%%sr" \
>>                : "=d"(_tmpsr) : "0"(_tmpsr), "d"(_level) \
>>                 :"cc","d0","d1","d2","d3","d4","d5", \
>>                 "a0","a1","a2","a3","a4","a5","a6","memory" ); \
>>    } while( 0 )
>
>
> I *really* don't like this.
> Given that the assembly instructions in question don't affect d0-d5/ 
> a0-a6 why would you want to place them in the clobber list?
>
> To summarize my position:
> 1) The _TOD_* variables must be declared as volatile since their  
> values can change in a fashion (Deus ex machina) not apparent to  
> compiler.
> 2) The M68K_BARRIER macro, or its equivalent addition to the enable/ 
> disable macros, is required to keep the optimizer from hoisting/ 
> sinking any code beyond the interrupt disable/enable operations.   My  
> feeling is that it's clearer and simpler to just add the "memory",  
> "cc" to the disable/enable macros, but I'm not dogmatic about this.
>
> These two steps seem very clear to me since they impart to the  
> compiler exactly the information needed.  Both steps are necessary  
> and together they should be sufficient.
>
I agree with everything above.  I do not want to add unnecessary 
register dependencies.
Plus this technique should be able to be added fairly mechanically to 
the other ports.

The next question is what other SuperCore variables need to be 
volatile.  _Thread_Executing,
_Thread_Heir, and _Context_Switch_necessary seem very high on the list.

Eric.. will the EPICS team submit a fix for the m68k, i386, and powerpc 
ports?  I can probably
do the others myself based upon those.