The problem with skyeye and csb337

[Joel Sherrill]

xi yang wrote:
> hi all:
>  Today i try to resolve the problem of csb337 with skyeye,although i 
> have not
> got it ,but i got some progresses and i think i have known why the
> ticker program can
> not run with skyeye.
Good progress.  I will try to help with the RTEMS part.
>  Problems with skyeye.
>  1)At91rm92 of skyeye has not implemented AIC completely.
>      1st.It has not implemented the 32 source vector registers.
>      2ed.When read the AIC_IVR,return the current interrupt number but 
> not
>            the address of interrupt handler in Source vector registers .
>            I don't know why you guys implement it like this ,but in
> at91rm9200 manual
>            wirte "The interrupt vector registers contains the vector
> porgrammed by
>                     the user in the Source Vector Register 
> corresponding to the
>                     current interrupt."
>           I guess linux does not use AIC's vector table to manage the
> interrupt,so linux can
>           works well with this way,but in real hardware,read AIC_IVR
> return the
>           address of handler,and csb337 use AIC's source vector 
> registers.
>           So i rewrite this part and i am going to wirte a completed 
> AIC .
>     3rd.When wirte the AIC_EOICR,skyeye uses the data which be writen 
> to this
>           register to unset the interrupt pending register.But manual
> write like this
>           "The end of interrupt command register is used by the
> interrupt routine
>             to indicate that the interrupt treatment is complete.Any
> value can be
>             Written because it is only necessary to make a write to
> this register
>             location to signal the end of interrupt treatment."
>    4rd. Sky eye has not implemented interrupt prioriy of AIC and the 
> interrupt
>          nesting stacks,but without these tow features RTEMS also can 
> run well
>          with skyey.
>    5rd.In at91rm92.h there are a lot of macro like
>          #define SOMETHING BASE+offset without
>         the brackets(BASE+offset),I think this is dangerous.
>     So i want to rewrite the at91rm9200 of skyeye .Kang shuo do you 
> agree with
>        me?
> 2)Problems with Rtems.
>     In the initialization process.
>       1st.It seems that after executed
> Clock_driver_support_initialize_hardware(void)
>          Rtems has not enable the interrupt of clock
>         (ST_REG(ST_IER) =ST_SP_PITS)
>
Are you running hello or ticker?  The code in
c/src/lib/libcpu/arm/at91rm9200/clock has this routine

static void clock_isr_on(const rtems_irq_connect_data *unused)
{
    /* enable timer interrupt */
    ST_REG(ST_IER) = ST_SR_PITS;
}

which should be invoked when the interrupt is connected
via a call to BSP_install_rtems_irq_handler in the irq directory
one level up.

>       2ed.It seems that after disabled all the interrupt sources and
> install the
>             default_int_handler() at all 32 interrupt source vector
> registers,rtems
>             has not enabled the SYS interrupt source(number 1) of AIC
> and also  has
>             not installed the CLOCK interrupt handler(I guss rtems
> use  interrupt
>             managers to manage the interrupt of 32 lines.Because
> there are more
>             than one devices use the same line,for example,system
> clock and DBGU
>             use the same SYS interrupt source),but i can not find
> where is the SYS
>             interrupt source manger,who can tell me?
The code for interrupt management on this CPU should be
in c/src/lib/libcpu/arm/at91m9200/irq.  I don't see any
that is board specific reference in csb337/Makefile.am
>             Since the interrupt of SYS is disable ,there is not any
> clock interupt can be
>             delivered to CPU ,without the clock interrupt,the system
> is hang in idl
>             task.
>             So i enable the interrupt of clock and SYS interrupt
> source of AIC.Since
>             default_int_handler() is still in all 32 interrupt source
> vector registers ,at
>             every clock interrupt ,the system traps into 
> default_int_handler();
>              So,there are
>            " raw_idt_notify has been called
>             1
>              raw_idt_notify has been called
>              2
>              ..." on my screen.
>      Q1,Where is the code installs SYS interrupt handler?
>      Q2,Where is the code enables the interrupt of clock device and AIC?

c/src/lib/libcpu/arm/at91rm9200/irq - look for BSP_install_rtems_irq_handler
and look what it does when the interrupt is dynamically installed:

   /*
     * store the new handler
     */
    AIC_SVR_REG(irq->name * 4) = (uint32_t) irq->hdl;

    /*
     * unmask interrupt
     */
    AIC_CTL_REG(AIC_IECR) = 1 << irq->name;

    /*
     * Enable interrupt on device
     */
    if(irq->on) {
        irq->on(irq);
    }

i think that's all the code you are looking for.  irq->on() goes back to the
Clock driver "on" callback which I cut and pasted above.


>      I think code of Q1 contains code of Q2,and some unkonw reasons 
> result in
>         system has not executed the code of Q1.
I don't know if I helped or not.  Even though I maintain RTEMS, I
am not an expert on every CPU it supports.  I have to struggle
through the manuals with the rest of you. :)

--joel